Metal caps and foil replace the exterior case to block moisture at the electrodes while cutting capacitor weight.
An insulator layer with a conduction path limits substrate eddy currents while preserving electrical connection in high-frequency passive components.
An interfacial layer raises the electrode-dielectric energy barrier, cutting capacitor leakage and restoring symmetrical I-V behavior in ICs.
Rounded laminate corners and a 20 μm electrode-to-corner distance help thin MLCC external electrodes keep base layer continuity and plating quality.
Sn placed in MLCC interface and side margins boosts Schottky barriers and hydrogen adsorption without changing sintering conditions.
Interdigitated multilayer MOS capacitor fingers raise capacitance density while maintaining breakdown voltage without added masks or process complexity.
Overlapping trench contacts and stacked high-k MIM layers raise capacitance density by 20% to 80% without excessive fabrication complexity.
A conductive enhancement structure inside the insulating layer redistributes electric fields to ease high-voltage concentration and improve breakdown strength.
Larger dielectric grains at active boundaries and tuned side margins help multilayer capacitors resist breakdown and improve high-temperature reliability.
Higher Sn content in MLCC side margins improves impact and crack resistance while preserving electrode overlap and moisture reliability.
An alumina interposer board replaces glass epoxy to resist deflection, attenuate vibration, and reduce noise in electronic components.
Larger dielectric grains near exposed internal electrodes cut interface pores in MLCC side margins, improving moisture resistance and compactness.
A core-shell internal electrode limits nickel-copper alloy expansion, improving moisture resistance and preventing radial cracks.
A stepped substrate keeps capacitor films away from diced edges, reducing chipping, moisture ingress, and inner electrode corrosion.
Sequential side margin formation on support-film unit chips avoids edge stress, preserves adhesion, and improves MLCC yield and reliability.
A shielding layer between the capacitor electrodes and substrate cuts parasitic capacitance, improving quality factor and reducing energy loss.
Ag-coated Cu particles in an MLCC conductive resin layer suppress oxidation and ion migration while limiting CO2 outgassing.
Alloyed Ni and Sn densify multilayer ceramic capacitor electrodes, suppressing gaps and moisture ingress to protect insulation reliability.
Anodized concave cavities guide nanotube bundle growth and a conformal stack preserves bundle integrity while simplifying dense capacitor fabrication.
Radiation-cured submicron dielectric layers and tuned electrode thickness improve capacitor stability under heat, ripple current, and moisture.
Protruding wall portions buffer piezoelectric vibration at the external electrodes, limiting stress transfer to the substrate and suppressing acoustic noise.
An intermetallic external electrode with oxide-coated metal particles helps thin MLCCs preserve conductivity, adhesion, and rigidity.
Positioned metal concentration peaks at dielectric-electrode interfaces preserve insulation reliability and continuity modulus in thinner multilayer ceramic chips.
Ceramic wires in MLCC cover portions suppress cracks and delamination from electrostriction and impact while preserving capacitance.
Strategically spaced internal electrode gaps create floating capacitance, lowering capacitance while limiting ESR increase and preserving Q value.
Double bottleneck internal electrodes increase corner spacing to block moisture ingress, reduce cracking, and preserve capacitance.
Segmented external electrodes and end-covering insulation block moisture gaps and improve impact resistance in compact multilayer ceramic capacitors.
Alternating main and side electrode stacks with floating electrodes raise capacitance in a small area while reducing resonance across a wide band.
A graded Cu electrode uses fine grains near the ceramic and coarser grains above to limit reflow cracking while preserving adhesion and moisture resistance.
Ceramic-covered lead electrodes are co-sintered with the body to simplify MLCC production while blocking moisture and plating-solution penetration.
Controlling internal electrode hole distribution to D99 ≤ 8.0 μm reduces electric field concentration while preserving capacitance and reliability.
Selective through-portions in non-overlap electrode regions let dielectric layers connect across layers, reducing piezoelectric deformation and cracking.
Staggered gaps between internal electrodes create floating capacitance to lower capacitance while maintaining ESR and Q value.
An unsaturated organic compound absorbs oxygen near metal particles, limiting oxidation while preserving thermal and electrical performance.
Controlled BaTiO3 dopant ratios improve side margin densification and crack resistance in ultra-small multilayer capacitors.
A coating layer with openings and sintered conductive glass blocks moisture and ion migration in multilayer ceramic external electrodes.
Sequential transfer and dipping keep multilayer capacitor electrodes thin overall while thickening corners to block moisture ingress.
A core-shell perovskite dielectric suppresses oxygen vacancy diffusion during reductive firing, extending ceramic electronic device lifetime.
Higher Mg content in MLCC cover and margin regions improves moisture resistance as dielectric layers are thinned to raise capacitance.
Through-hole interposer routing and joining regions shorten current paths in multilayer ceramic capacitors to cut ESL and high-frequency signal loss.
A stacked 5-terminal electrode layout cuts current loop area and ESL while combining four capacitors into one compact mounting footprint.
A shaped MLCC external electrode with thicker outer regions improves corner coverage and blocks moisture penetration without uniform thickening.
Layered cover portions and margin integration prevent electrode bending and delamination, improving breakdown voltage and moisture resistance.
An asymmetric floating electrode layout preserves overlap area despite manufacturing tolerances, keeping capacitance and resistance more consistent.
Zr and Ge alloying in MLCC internal electrodes shifts sintering behavior to improve layer connectivity, capacitance, and moisture resistance.
Ca-Al-Si-O segregation phases strengthen dielectric grain joints and suppress cracks in multilayer ceramic electronic devices.
Conductor layers in outer gap portions compress inner layers to block moisture paths from external electrodes and stabilize capacitor characteristics.
Varying the antiferroelectric layer thickness stabilizes charge accumulation across voltage ranges while preserving capacitance and insulation reliability.
Sn and rare-earth secondary phases at grain boundaries let sub-0.6 μm dielectric layers retain reliability and dielectric constant.
A conductive carbon electrode portion acts as a fuse in laminated ceramic components, cutting overcurrent to suppress heating, fuming, and firing.