Multilayer Capacitor Electrode Gap Layout for Low Capacitance
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Solution Overview
Problem
Existing multilayer ceramic capacitors face challenges in achieving low electric capacitance without compromising size or increasing ESR (Equivalent Series Resistance) and reducing the number of internal electrode stacks, which can lead to decreased Q value.
Innovation Solution
A multilayer capacitor design featuring internal electrodes spaced apart on the same dielectric layer with strategically arranged gaps to create floating capacitance, allowing for adjustable electric capacitance without excessive reduction in the number of internal electrode stacks, utilizing a sintered dielectric layer structure with barium titanate-based materials and non-planar electrode surfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of internal electrode stacks is reduced to achieve low capacitance, then electric capacitance is reduced, but Q value decreases
Solution Approach 1:
The internal electrodes are segmented into multiple stacks that are spaced apart from each other, creating gaps between adjacent electrodes. This segmentation reduces the overlapping area between electrodes, thereby reducing capacitance while maintaining sufficient electrode数量 for high Q value
Solution Approach 2:
The patent introduces gaps at specific locations between internal electrodes, creating non-uniform spacing. This local modification reduces capacitance in specific regions while maintaining electrode structure integrity, achieving low capacitance without excessive reduction in electrode stacks
2Quantity of substance
If low-κ ceramic is used as dielectric material to achieve low capacitance, then electric capacitance is reduced, but device size increases
Solution Approach 1:
Instead of changing dielectric material properties, the patent reduces capacitance by modifying the spatial arrangement of internal electrodes in the stacking direction. By creating gaps between electrodes in the vertical dimension, capacitance is reduced without increasing the lateral footprint of the capacitor
3Quantity of substance
If internal electrodes are spaced apart to reduce capacitance, then electric capacitance is reduced, but ESR increases
Solution Approach 1:
The patent applies partial spacing between internal electrodes rather than complete separation. The gaps are strategically positioned and sized to reduce capacitance to the desired level while maintaining sufficient electrode overlap to keep ESR within acceptable ranges
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively achieves relatively low electric capacitance while maintaining a suitable structure for capacitance adjustment, minimizing increases in ESR and preserving the Q value, thus addressing the limitations of existing capacitors.
Implementation Method 1
a body (110) including a plurality of dielectric layers (111) disposed in a first direction, a plurality of first internal electrodes (121) disposed in the first direction, and a plurality of second internal electrodes (122) disposed in the first direction
Data Source
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AI summary
A multilayer capacitor includes a body including a plurality of dielectric layers disposed in a first direction, a plurality of first internal electrodes disposed in the first direction, and a plurality of second internal electrodes disposed in the first direction. At least a portion of the plurality of first internal electrodes and the plurality of second internal electrodes are spaced apart from each other on a same dielectric layer among the plurality of dielectric layers to have a gap, and among at least three gaps adjacent in the first direction, a gap having a greater distance in the first direction from a reference of the body in the first direction has a greater distance in one direction from a reference of the body in the one direction.