Multilayer Ceramic Capacitor Hole Distribution for Delamination Resistance
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Solution Overview
Problem
Multilayer ceramic capacitors face delamination issues at the boundary between internal electrode layers and dielectric layers due to differences in shrinkage rates, especially under thermal stress, leading to insulation failures.
Innovation Solution
The distribution of communication holes in the internal electrode layers is adjusted to enhance adhesion, with a higher dielectric entry ratio at connection regions, reducing delamination while maintaining high capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the density of internal electrode layers is increased to increase capacitance, then the opposing surface area between adjacent internal electrode layers increases, but the difference in shrinkage rate between internal electrode layers and dielectric layers becomes large, causing delamination at the boundary portion
Solution Approach 1:
The patent applies local quality by creating different communication hole configurations in different regions of the internal electrode layers. Specifically, the first communication holes are formed in the overlapping regions where internal electrode layers contact dielectric layers, while the second communication holes are formed in non-overlapping regions. This local differentiation allows the overlapping regions to have enhanced adhesion properties through dielectric penetration, while maintaining high electrode density in the non-overlapping regions for capacitance.
Solution Approach 2:
The patent employs composite materials by combining the internal electrode layer material with the dielectric layer material in a way that creates a composite structure at the boundary regions. The dielectric material penetrates into the communication holes of the internal electrode layers, forming a composite interface that combines the adhesive properties of the dielectric with the conductive properties of the electrode, thereby preventing delamination while maintaining electrical functionality.
2Strength
If the continuity of internal electrode layers is increased to increase opposing surface area, then capacitance increases, but delamination occurs at the boundary portion between internal electrode layers and dielectric layers under thermal stress
Solution Approach 1:
The patent utilizes porous materials by creating communication holes within the internal electrode layers. These holes provide pathways for the dielectric material to penetrate and form anchoring structures. The porous structure of the internal electrode layers at the boundary regions allows the dielectric to interlock mechanically, creating a stable composite interface that resists delamination under thermal stress while maintaining the overall continuity and high opposing surface area of the electrode layers.
3Reliability
If internal electrode layers are made more dense to increase capacitance, then electrical continuity improves, but shrinkage rate difference with dielectric layers increases, leading to structural defects and insulation failure
Solution Approach 1:
The patent applies parameter changes by modifying the physical and chemical parameters of the internal electrode layers in different regions. The density, porosity, and composition of the internal electrode layers are adjusted to create communication holes in specific regions while maintaining high density in other regions. This parameter differentiation allows the electrode structure to achieve both high electrical continuity for capacitance and controlled shrinkage characteristics for thermal stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents delamination and maintains large capacitance, improving the reliability and structural integrity of multilayer ceramic capacitors.
Implementation Method 1
a plurality of communication holes communicating in the lamination direction and into which a dielectric of the plurality of dielectric layers has entered
Data Source
AI summary
A multilayer ceramic capacitor includes an internal layer portion including dielectric layers and internal electrode layers. Internal electrode layers include counter portions overlapping each other in a layering direction, and extension portions extending to an end surface or a side surface of the multilayer body, and not overlapping each other in the layering direction. The internal electrode layers include communicating holes communicating in the layering direction and into which a dielectric of a dielectric layer enters. An existence ratio of the communicating holes into which the dielectric enters is higher in a connecting region of the counter portions to which the extension portions are connected than in a center of the counter portions, and is higher in the connection region than in the center of the extension portions.