DRAM Capacitor Hole Formation Using Dual Over-Etch Stop Layers
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Solution Overview
Problem
The existing methods for forming capacitor holes in DRAMs result in uneven sizes, affecting the performance of dynamic random access memory devices due to variations in etching depths and selectivity during the over-etching process.
Innovation Solution
A method involving an over-etching depth adjusting layer with specific material layers and etching selectivity is used to form etching holes that terminate in a first material layer, ensuring consistent etching depths and even capacitor hole sizes by controlling the etching process with a hard mask layer and anisotropic dry etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a hard mask layer is etched to form capacitor holes without an over-etching depth adjusting layer, then the etching process is simpler and faster, but the capacitor holes become uneven in size due to variations in etching depth
Solution Approach 1:
The patent segments the over-etching depth control function into two distinct material layers (first material layer and second material layer) with different etching selectivities. The first material layer provides primary depth control with higher etching selectivity, while the second material layer provides secondary depth control with lower etching selectivity. This segmentation allows precise control of capacitor hole depth and size uniformity without requiring complex single-layer etching processes.
Solution Approach 2:
The patent forms the over-etching depth adjusting layer (comprising the first and second material layers) before the etching process to preliminarily establish the depth control structure. This preliminary action ensures that the etching holes automatically terminate at the desired depth in the first material layer, preventing over-etching and ensuring uniform capacitor hole sizes without requiring complex real-time etching control.
2Manufacturing precision
If the etching process over-etches the hard mask layer deeply, then the capacitor holes are formed more completely, but lateral etching occurs which enlarges the capacitor holes unevenly
Solution Approach 1:
The patent preliminarily forms the over-etching depth adjusting layer with specific thicknesses before etching to establish a depth stop mechanism. The first material layer is designed with a thickness that limits the maximum etching depth, preventing the etching process from proceeding too deeply and causing lateral etching. This preliminary depth control structure ensures that etching holes terminate cleanly without lateral expansion.
Solution Approach 2:
The patent applies different etching selectivities to different material layers locally. The first material layer has a higher etching selectivity ratio (hard mask layer to first material layer) compared to the second material layer (hard mask layer to second material layer). This local differentiation in etching properties ensures that etching stops precisely at the first material layer, preventing lateral etching in the supporting layer while still allowing complete formation of capacitor holes.
3Manufacturing precision
If the hard mask layer thickness is increased to prevent over-etching, then capacitor hole depth control improves, but the etching process time increases and productivity decreases
Solution Approach 1:
The patent segments the depth control function into two material layers with different thicknesses and etching selectivities. The first material layer has a smaller thickness but higher etching selectivity, providing rapid depth control. The second material layer has a larger thickness but lower etching selectivity, providing additional depth control without requiring excessive etching time. This segmentation achieves precise depth control faster than using a single thick hard mask layer.
Solution Approach 2:
The patent changes the etching selectivity parameter by introducing two material layers with different selectivity ratios. The first material layer has a higher etching selectivity ratio that accelerates the etching stop process, reducing the time required to achieve precise depth control. This parameter change allows the etching process to complete faster while maintaining or improving depth control precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures that capacitor holes are formed with consistent sizes, improving the performance of DRAMs by preventing lateral etching and ensuring all holes expose connecting pads at the same time, thereby enhancing the overall device performance.
Implementation Method 1
etching the first material layer and the supporting layer along the etching holes to form a plurality of capacitor holes
Data Source
AI summary
A method for forming capacitor holes is provided. By forming a first material layer and a second material layer which are thinner and are different in materials on a supporting layer as an over-etching depth adjusting layer, when etching holes are formed in a hard mask layer and the hard mask layer is over-etched, a certain over-etching depth may be formed in the second material layer, and the etching holes terminate in the first material layer, so that the etching depth of the etching holes can be corrected and adjusted. Accordingly, the etching holes formed after the hard mask layer is over-etched can have the same depth or have a small depth difference. Therefore, time points at which the plurality of capacitors holes formed expose the corresponding connecting pads are substantially the same or differ very little, improving the performance of the DRAM.