Capacitor Module Layout for Low-Height Noise Absorption
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Solution Overview
Problem
Existing power conversion devices face challenges in miniaturizing the capacitor module while maintaining effective noise absorption and voltage smoothing, leading to increased height and size constraints, particularly in applications like electric vehicles.
Innovation Solution
A capacitor module design that incorporates a smoothing capacitor and a noise absorbing capacitor within a common case, with the noise absorbing capacitor and ground bus bars arranged within a defined PN region to minimize height, allowing for reduced module and device dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the noise absorbing capacitor and ground bus bar are arranged outside the PN region, then easier assembly and manufacturing are achieved, but the height of the capacitor module increases
Solution Approach 1:
The patent applies dimensionality change by arranging the noise absorbing capacitor and ground bus bar within the PN region (a two-dimensional plane defined by the smoothing capacitor's electrode surfaces) rather than extending in the third dimension (height direction). This spatial reorganization reduces the capacitor module's height while maintaining electrical functionality, directly resolving the contradiction between compactness and manufacturability.
Solution Approach 2:
The patent implements nesting by placing the noise absorbing capacitor and ground bus bar inside the PN region, effectively nesting multiple functional elements within a constrained spatial boundary. This nested arrangement allows the noise absorbing components to occupy space that would otherwise be unused, reducing overall module height without complicating the assembly process.
2Volume of stationary object
If the capacitor module is miniaturized, then the power conversion device size is reduced, but the noise absorption and voltage smoothing effectiveness may be compromised
Solution Approach 1:
The patent applies local quality by strategically positioning the noise absorbing capacitor and ground bus bar specifically within the PN region, optimizing the local electrical characteristics in this critical area. This localized arrangement ensures effective noise absorption and voltage smoothing while minimizing the overall module volume, as the components are placed precisely where they provide maximum electrical benefit rather than uniformly distributing them.
Solution Approach 2:
By transitioning the arrangement from a three-dimensional extension to a two-dimensional planar configuration within the PN region, the patent achieves volume reduction while preserving the electrical performance. The noise absorbing components are redistributed within the existing electrical field geometry, maintaining their effectiveness without increasing module dimensions.
3Reliability
If the ground bus bar is made longer to connect to external ground, then better grounding is achieved, but the module height increases
Solution Approach 1:
The patent implements nesting by incorporating the ground bus bar within the PN region's spatial boundaries. The ground bus bar is arranged to extend from the noise absorbing capacitor to the external ground connection while remaining confined within the two-dimensional PN plane, preventing vertical protrusion and maintaining compact module height while ensuring effective grounding connectivity.
Solution Approach 2:
The patent resolves the grounding contradiction by reconfiguring the ground bus bar's path to lie within the PN region's plane rather than extending vertically. This dimensional reorganization allows the ground bus bar to achieve adequate length for effective grounding while containing its extent within the horizontal boundaries of the PN region, thus preventing height increase.
Data Source
AI summary
A capacitor module includes a smoothing capacitor, a P-side Y capacitor and a N-side Y capacitor as noise absorbing capacitors, a capacitor case, a P-side bus bar, a N-side bus bar, and a ground bus bar. A virtual plane along a P-side electrode surface, which is an electrode surface on a high potential side of the smoothing capacitor, is referred to as a P-side virtual plane. A virtual plane along a N-side electrode surface, which is an electrode surface on a low potential side of the smoothing capacitor, is referred to as a N-side virtual plane. A region between the P-side virtual plane and the N-side virtual plane is defined as a PN region. The entire noise absorbing capacitor and the entire ground bus bar are arranged in the PN region.