Capacitor-Powered Oscillator ADC for Low-Power Data Conversion
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Solution Overview
Problem
Conventional analogue-to-digital converters (ADCs) face challenges in scaling efficiently with smaller semiconductor process node geometries and achieving low power consumption, especially in battery-powered devices with continuous data conversion requirements.
Innovation Solution
The proposed solution involves an analogue-to-digital converter circuit that uses a sampling capacitor to charge a controlled oscillator during a read-out phase, where the frequency of oscillation depends on the capacitor's voltage, allowing for efficient data conversion with reduced power consumption and compact circuit area. This circuit includes a counter to generate a count value based on oscillations, and optional differential input handling and compensation for non-linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional ADCs use multiple analogue components such as banks of well-matched or ratioed resistors, capacitors or current sources, then conversion accuracy can be maintained, but semiconductor area and power requirements increase significantly
Solution Approach 1:
The patent changes the fundamental operating parameters of the ADC by using a single capacitor that operates in different states (charged to different voltage levels) rather than multiple precisely-matched components. The capacitor is charged to voltage levels corresponding to the input signal amplitude, and then discharged through oscillators with different frequencies, encoding the analog value in the number of oscillations. This parameter-based approach replaces component-matching requirements with voltage-level encoding, achieving accurate conversion with minimal area.
Solution Approach 2:
The single capacitor serves multiple functions: it acts as the sole storage element, the reference for voltage comparison, and the power source for the oscillators during the conversion process. By making the capacitor multi-functional, the design eliminates the need for separate banks of resistors, capacitors, or current sources that would otherwise be required to maintain conversion accuracy, thereby dramatically reducing semiconductor area while preserving functional capability.
2Measurement precision
If conventional ADCs use multiple analogue components such as banks of well-matched or ratioed resistors, capacitors or current sources, then conversion accuracy can be maintained, but power requirements increase significantly
Solution Approach 1:
The patent changes the power consumption model by using voltage-level encoding instead of continuous analog component operation. The single capacitor is charged once to a voltage level representing the input signal, then this stored energy is used to power the oscillators during the conversion phase. This transient power usage pattern replaces the continuous power requirements of traditional ADC components, significantly reducing overall power consumption while maintaining conversion accuracy through precise voltage and frequency relationships.
Solution Approach 2:
The charged capacitor serves as a self-contained energy source that powers the oscillators during the conversion process without requiring external power supplies for each component. The capacitor's stored energy is efficiently utilized to drive the oscillation process, and the system self-regulates the power distribution based on the conversion requirements. This self-service approach eliminates the need for multiple powered analog components, reducing total power consumption while maintaining conversion accuracy.
3Use of energy by stationary object
If ADCs are designed for low-power operation in battery-powered devices, then power consumption is reduced, but maintaining continuous data conversion capability becomes difficult
Solution Approach 1:
The patent employs periodic action through its two-phase operation cycle: a sampling phase where the capacitor is charged to the input signal voltage level, and a conversion phase where the capacitor powers the oscillators to perform the actual conversion. This periodic alternation between sampling and conversion allows the ADC to maintain continuous data conversion capability while consuming power only during the brief conversion phase. The capacitor acts as an energy buffer, storing power during sampling and releasing it during conversion, enabling low-power continuous operation suitable for battery-powered devices.
4Area of stationary object
If a single capacitor is used instead of multiple analogue components, then semiconductor area is reduced, but circuit complexity in managing phases and oscillators increases
Solution Approach 1:
The patent segments the conversion process into distinct temporal phases (sampling phase and conversion phase) rather than using spatial segmentation of multiple simultaneous analog components. The single capacitor is sequentially used in different roles during different phases: first as a voltage storage element during sampling, then as a power source during conversion. This temporal segmentation allows the use of a single physical component to replace multiple components, reducing area while managing complexity through clear phase separation and controlled switching between operational modes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient data conversion with reduced power consumption and compact circuit area, maintaining linearity and accuracy, suitable for small semiconductor process nodes and battery-powered devices.
Implementation Method 1
the first capacitor powers the first controlled oscillator and a frequency of oscillation in the output of the first controlled oscillator depends on the voltage of the first capacitor
Data Source
AI summary
This application describes method and apparatus for data conversion. An analogue-to-digital converter circuit receives an analogue input signal (SIN) and outputs a digital output signal (SOUT). The circuit has a sampling capacitor, a controlled oscillator and a counter for generating a count value based on a number of oscillations in an output of the controlled oscillator in a count period during a read-out phase. The digital output signal is based on the count value. The converter circuit is operable in a sampling phase and the read-out phase. In the sampling phase, the sampling capacitor is coupled to an input node for the input signal, e.g. via switch. In the read-out phase, the sampling capacitor is coupled to the controlled oscillator, e.g. via switch, such that capacitor powers the first controlled oscillator and a frequency of oscillation in the output of the first controlled oscillator depends on the voltage of the first capacitor.