Capacitor with Rough Top Electrode for High Density Semiconductor Devices

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional capacitor designs struggle to achieve high capacitance values without increasing the device's area burden, limiting their efficiency in high-density applications.

Innovation Solution

The method involves forming a capacitor with a sphere ceramic material and removing porogens to create a rough top electrode surface, which increases capacitance by at least 50% compared to a planar surface with the same projected area, while maintaining efficient substrate use.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional capacitor designs use planar electrode surfaces, then the device area is minimized, but the capacitance value is limited and cannot achieve high capacitance without increasing area

Engineering Contradiction:
Improvecapacitance valueVSAvoiddevice area
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The patent applies spheroidality by forming spherical ceramic particles within the dielectric layer. These spherical structures create a roughened electrode surface topology that increases the effective surface area available for capacitance formation. The curved spherical shapes allow for greater surface area within the same projected footprint compared to planar surfaces, thereby increasing capacitance without proportionally increasing device area.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent utilizes porous materials by incorporating ceramic particles with controlled porosity into the dielectric layer. The porous structure of these ceramic particles provides additional surface area for electrical interaction while maintaining a compact overall structure. This porous architecture enables higher capacitance values by increasing the effective electrode surface area without requiring a proportional increase in the device's projected area.

Inventive Principle:
Principle #31Porous materials

2Quantity of substance

If the electrode surface is made rough to increase capacitance, then capacitance value increases by at least 50%, but the manufacturing complexity increases

Engineering Contradiction:
Improvecapacitance valueVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming the spherical ceramic particles and roughened surface topology during the dielectric layer formation process itself, rather than as a separate subsequent step. The ceramic particles are incorporated into the dielectric material before electrode deposition, allowing the rough surface structure to be established in advance. This preliminary formation of the rough surface structure simplifies manufacturing by integrating multiple functions into a single process step.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes composite materials by combining ceramic particles with the dielectric material to create a composite dielectric layer. This composite structure inherently provides the roughened surface topology needed for increased capacitance while maintaining structural integrity. The composite material approach simplifies manufacturing by achieving multiple objectives (dielectric function, surface roughening, mechanical strength) through a single material system rather than requiring separate processing steps.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS11164937B2Semiconductor device and manufacturing method thereof
Publication Date: 2021.11.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11164937B2 patent drawing
  • US11164937B2 patent drawing
  • US11164937B2 patent drawing

AI summary

A semiconductor device includes a semiconductor substrate, a capacitor, and an interconnection layer. The capacitor is over the semiconductor substrate and includes a bottom electrode, a top electrode, and an insulator layer. The top electrode has a top surface and a bottom surface rougher than the top surface of the top electrode. The insulator layer is between the bottom electrode and the top electrode. The interconnection layer is over the semiconductor substrate and is electrically connected to the capacitor.