Integrated Capacitor Stack with Insulative Pillars Against Layer Collapse
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Solution Overview
Problem
Existing methods for fabricating capacitors peripheral to memory arrays face challenges in maintaining structural integrity during the removal of insulative materials, leading to potential collapse of remaining layers, which complicates the formation of capacitive stacks.
Innovation Solution
A method involving partial removal of insulative material to form insulative pillars that support remaining layers, followed by deposition of conductive material to create alternating conductive and insulative levels, which are then integrated into capacitors, utilizing gate replacement methodology for memory cell fabrication to reduce costs and fabrication steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If insulative material is completely removed to form capacitors, then capacitor formation is enabled, but structural integrity is compromised and layers may collapse
Solution Approach 1:
The insulative material removal is segmented into two stages: first removing insulative material from selected regions to form initial capacitor structures, then selectively removing remaining insulative material in subsequent steps. This segmentation allows the structure to maintain integrity during intermediate stages while achieving complete capacitor formation ultimately.
Solution Approach 2:
Capacitor structures are preliminarily formed by removing insulative material from specific regions before complete removal is performed. This preliminary action creates a scaffold structure that maintains structural integrity while enabling subsequent complete capacitor formation without causing layer collapse.
2Reliability
If separate fabrication processes are used for capacitors and memory arrays, then each component can be optimized, but fabrication costs and time increase
Solution Approach 1:
The fabrication process merges capacitor formation and memory array fabrication into a single integrated process sequence. Common layers (tunnel dielectric, block dielectric, conductive materials) are formed simultaneously for both capacitor and memory structures, while subsequent processing steps selectively differentiate between the two component types, achieving both optimization and efficiency.
Solution Approach 2:
The fabrication process uses universal materials and processes that serve dual purposes: the same dielectric layers, conductive materials, and deposition/etching techniques are used for both capacitor and memory array fabrication, making the process multi-functional and reducing overall fabrication complexity.
3Strength
If insulative material is partially removed to maintain structural support, then structural integrity is maintained, but additional fabrication steps are required
Solution Approach 1:
The fabrication process is segmented into distinct phases: initial insulative material removal for capacitor nucleation, intermediate processing with remaining insulative support, and final selective removal. This segmentation transforms the complex multi-step process into manageable stages, each with clear objectives and outcomes.
Solution Approach 2:
The partially remaining insulative material serves as an intermediary structure during fabrication, providing temporary structural support and process guidance. This intermediary element enables precise control over capacitor formation while maintaining overall structural integrity throughout the fabrication sequence.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach maintains structural integrity during capacitor formation, reduces fabrication costs and time, and allows for efficient integration of capacitors with memory arrays using common materials and processes.
Implementation Method 1
The second insulative material is exhumed with etchant provided in the slots to form voids within the second levels
Implementation Method 2
The voids are filled with conductive material, and the conductive material is formed into conductive plates within the second levels
Data Source
AI summary
Some embodiments include an integrated structure having a semiconductor base and an insulative frame over the semiconductor base. The insulative frame has vertically-spaced sheets of first insulative material, and pillars of second insulative material between the vertically-spaced sheets. The first and second insulative materials are different from one another. Conductive plates are between the vertically-spaced sheets and are directly against the insulative pillars. Some embodiments include capacitors, and some embodiments include methods of forming capacitors.