Capacitor with Traversing Pins for Compact Integrated Device
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Solution Overview
Problem
Existing integrated devices with capacitors are too large and thick to meet the form factor requirements of mobile computing and wearable devices, occupying excessive space on printed circuit boards.
Innovation Solution
An integrated device design featuring a capacitor with multiple pins, where at least one pin traverses through a plate, allowing for a compact form factor by providing direct electrical paths and reducing the need for routing around the capacitor, thus minimizing space usage and material consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a capacitor is mounted externally on the PCB, then the capacitor can be easily installed and replaced, but the device form factor becomes too large and thick
Solution Approach 1:
The patent merges the capacitor with the package substrate by integrating the capacitor directly into the substrate structure. The capacitor plates are formed within the substrate layers, eliminating the need for separate external capacitor components and reducing overall device footprint while maintaining electrical functionality.
Solution Approach 2:
The capacitor is nested within the package substrate structure. The capacitor plates are embedded in the substrate layers, with the first plate in a first dielectric layer and the second plate in a second dielectric layer, creating a compact nested arrangement that saves space.
2Ease of manufacture
If traditional capacitor routing is used, then the electrical connections are simple to establish, but the device requires excessive space for routing around the capacitor
Solution Approach 1:
The patent transitions from planar routing to three-dimensional vertical routing by having pins traverse through the capacitor plates. This dimensional change allows electrical connections to pass through the capacitor structure rather than routing around it, significantly reducing the horizontal space required for connections.
Solution Approach 2:
The capacitor is segmented into multiple plates with multiple pins distributed across different locations. This segmentation allows for distributed electrical connections that reduce routing complexity and space requirements compared to a single large connection area.
3Area of stationary object
If pins traverse through capacitor plates, then the electrical path is direct and space is minimized, but the manufacturing complexity increases
Solution Approach 1:
The pins are formed to traverse through the capacitor plates during the substrate fabrication process itself, before final assembly. This preliminary formation of through-traversing pins integrates the complex routing into the base manufacturing流程, avoiding additional post-fabrication steps.
Solution Approach 2:
The pin formation process is merged with the capacitor plate formation process. The same fabrication steps that create the capacitor plates and dielectric layers also create the pin structures, combining multiple functions into a unified manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves a compact form factor, reduces current drop, and improves signal performance by providing direct electrical paths, making it suitable for mobile and wearable devices while maintaining effective capacitance.
Implementation Method 1
The capacitor includes a first plate, a second plate, and an insulation layer located between the first plate and the second plate
Data Source
AI summary
Some features pertain to an integrated device that includes a die and a first redistribution portion coupled to the die. The first redistribution portion includes at least one dielectric layer and a capacitor. The capacitor includes a first plate, a second plate, and an insulation layer located between the first plate and the second plate. The first redistribution portion further includes several first pins coupled to the first plate of the capacitor. The first redistribution portion further includes several second pins coupled to the second plate of the capacitor. In some implementations, the capacitor includes the first pins and/or the second pins. In some implementations, at least one pin from the several first pins traverses through the second plate to couple to the first plate of the capacitor. In some implementations, the second plate comprises a fin design.