Carbon-Capped Source/Drain Regions for Dopant-Stable Transistors

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In current transistor manufacturing techniques, dopants in epitaxial layers tend to diffuse out or deactivate during high-temperature processing steps, leading to reduced transistor performance due to increased contact resistivity and external resistance.

Innovation Solution

A Carbon capping layer, such as a Silicon Carbide layer, is applied to the source and drain regions to prevent dopant diffusion, which can be grown in-situ or deposited using precursors like ethane and monomethylsilane, reducing the effective Schottky barrier height and improving thermal stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If high-temperature processing steps are used in transistor manufacturing, then manufacturing processes can be completed, but dopants diffuse out of epitaxial layers or deactivate

Engineering Contradiction:
Improvemanufacturing process completionVSAvoiddopant stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A carbon capping layer is deposited on the source and drain epitaxial regions before high-temperature processing steps. This preliminary protective action prevents dopant diffusion and deactivation during subsequent manufacturing processes, allowing the transistor fabrication to proceed with high-temperature steps while maintaining dopant stability.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If dopants are maintained active in source/drain epitaxial layers, then contact resistivity is reduced and transistor switching speed is improved, but manufacturing complexity increases due to additional capping and uncapping steps

Engineering Contradiction:
Improvecontact resistivityVSAvoidmanufacturing process steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The carbon capping layer is deposited to protect dopants during manufacturing, then selectively removed (discarded) after serving its protective function. The layer is recovered/removed through standard semiconductor processing techniques such as oxygen plasma treatment or wet chemical etching, allowing the protected dopants to remain in the source and drain regions for optimal electrical contact.

Inventive Principle:
Principle #34Discarding and recovering

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The Carbon capping layer maintains active dopants, reducing contact resistivity and enhancing transistor switching speed and thermal stability, thereby improving on-state properties.

Implementation Method 1

The Carbon capping layer can be grown in-situ right after the growth of the epitaxial layer comprising the dopants, or the Carbon capping layer can be deposited, e.g., using a sputtered carbon. The Carbon capping layers as described herein can reduce the effective Schottky barrier height, reducing dopant diffusivity and preventing dopant out-diffusion during certain manufacturing/processing steps.

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

The Carbon capping layers as described herein can reduce the effective Schottky barrier height, reducing dopant diffusivity and preventing dopant out-diffusion during certain manufacturing/processing steps.

Methodology Applied
Scientific EffectSchottky barrier height reduction:

Implementation Method 3

In addition, a Carbon capping layer as described herein can improve source/drain thermal stability in certain instances.

Methodology Applied
Scientific EffectThermal stability enhancement:

Data Source

PatentUS20240006488A1Capping source and drain regions of transistors to prevent diffusion of dopants during fabrication
Publication Date: 2024.01.04 INTEL CORP
  • US20240006488A1 patent drawing
  • US20240006488A1 patent drawing
  • US20240006488A1 patent drawing

AI summary

In one embodiment, layers comprising Carbon (e.g., Silicon Carbide) are on source/drain regions of a transistor, e.g., before gate formation and metallization, and the layers comprising Carbon are later removed in the manufacturing process to form electrical contacts on the source/drain regions.