Carbon-Based Nonvolatile Memory Cell With Diode Steering Element
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Solution Overview
Problem
Existing nonvolatile memory arrays face challenges in creating erasable or multi-state memory cells that are scalable to small sizes and capable of storing more than 1 bit per cell, with complex solutions like floating gate and SONOS memory cells being difficult to fabricate and operate effectively in modern integrated circuits.
Innovation Solution
A nonvolatile memory cell is programmed using a steering element, such as a diode, in series with a carbon-based storage element, which includes polycrystalline carbon, amorphous carbon, graphene, or carbon nanotubes, to reduce leakage current and enable multiple data states through controlled electrical pulses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If floating gate and SONOS memory cells are used to achieve erasable or multi-state cells, then the memory cells can store multiple data states, but the device complexity and fabrication difficulty increase significantly
Solution Approach 1:
The patent extracts the storage function from complex three-terminal devices (floating gate, SONOS) and implements it in a simplified two-terminal structure using a diode steering element combined with a resistive switching element. This separation allows the storage mechanism to be achieved through simpler material combinations and device architecture while maintaining multi-state capability.
Solution Approach 2:
The patent changes the fundamental storage mechanism from charge storage (floating gate/SONOS) to resistive switching (two-terminal device with diode and resistive element). This parameter change in the storage mechanism enables multi-state operation through resistance changes rather than charge accumulation, simplifying the device structure and fabrication process.
2Adaptability or versatility
If floating gate and SONOS memory cells are used to achieve erasable or multi-state cells, then the memory cells can store multiple data states, but the difficulty of operating at very small dimensions increases
Solution Approach 1:
The patent removes the complex three-terminal structure requirement and implements multi-state storage in a two-terminal device. This extraction of the steering element function (performed by the diode) from the storage function (performed by the resistive switching element) enables scaling to smaller dimensions by eliminating the need for complex gate structures and reducing the minimum feature size requirements.
Solution Approach 2:
The patent transitions from planar three-terminal device geometry to a vertically stacked two-terminal structure. This dimensional reorganization allows for better scaling by utilizing vertical stacking to achieve multiple functions (steering and storage) in a compact footprint, enabling operation at very small dimensions while maintaining multi-state capability.
3Speed
If conventional programming pulses are used without initialization, then the programming speed is faster, but the read current levels are not well-defined and leakage current increases
Solution Approach 1:
The patent applies an initialization pulse before the programming pulse to prepare the resistive switching element in a known initial state. This preliminary action ensures that subsequent programming operations produce well-defined read current levels and reduces leakage current, while the programming pulse itself remains short duration to maintain fast programming speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the creation of high-density, rewritable memory cells with well-defined read current levels and simplified architecture, reducing leakage current and enabling efficient programming and reading of multiple data states, thus overcoming the limitations of existing technologies.
Implementation Method 1
The cell includes a steering element located in series with a storage element, and the storage element includes a carbon material. A method of programming a nonvolatile memory cell includes applying at least one initialization pulse having a duration of at least 1 ms, followed by applying plural programming pulses having a duration of less than 1 ms.
Data Source
AI summary
A method of programming a nonvolatile memory cell includes applying at least one initialization pulse having a duration of at least 1 ms, followed by applying plural programming pulses having a duration of less than 1 ms. The cell includes a steering element located in series with a storage element, and the storage element includes a carbon material.