Carrier Board Structure With Embedded Circuit Layer
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Solution Overview
Problem
The existing carrier board structures face challenges in accommodating complex circuit layouts due to fixed sizes and surfaces, leading to increased volume and difficulty in assembly, as they require more layers and expanded contact areas for circuit connections.
Innovation Solution
A carrier board structure with an embedded circuit layout on both sides of the core layer, allowing for double-sided circuit connections, which reduces the number of layers and contact areas needed, enhancing flexibility and space utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the layer number of circuit build-up structure is increased to accommodate complex circuits, then the circuit layout capability is improved, but the volume of carrier board structure becomes larger
Solution Approach 1:
The patent introduces an embedded circuit layer within the core layer, transitioning from a single-sided surface layout to a three-dimensional embedded structure. This allows circuits to be routed through the interior of the core layer rather than only on external surfaces, effectively adding a new dimensional space for circuit accommodation without increasing the external dimensions of the carrier board.
2Adaptability or versatility
If the area of pads is expanded to connect more circuits on the same side, then the circuit connection capability is improved, but the area available for other circuits is reduced
Solution Approach 1:
By embedding circuit layers within the core layer thickness, the patent moves circuit routing from a two-dimensional surface constraint to a three-dimensional interior space. This allows multiple circuit connections to be established through the embedded layer without requiring larger pad areas on the external surfaces, thereby maintaining full board area availability while increasing connection capability.
3Adaptability or versatility
If the contact area is expanded to accommodate more circuits, then the circuit aggregation capability is improved, but the assembly difficulty increases
Solution Approach 1:
The patent segments the circuit routing function across multiple independent layers: external circuit build-up layers on the surfaces and an embedded circuit layer within the core. This segmentation allows circuits to be distributed and aggregated through different spatial zones, reducing the need for large concentrated contact areas and simplifying assembly by maintaining standard external interface dimensions.
Data Source
AI summary
Carrier board structure with an increased core-layer trace area and method for manufacturing the same are introduced. The carrier board structure comprises a core layer structure, a first circuit build-up structure, and a second circuit build-up structure. The core layer structure comprises a core layer, a signal transmission portion, and an embedded circuit layer, wherein the signal transmission portion and the embedded circuit layer are disposed inside the core layer and electrically connected. The first circuit build-up structure is disposed on the core layer on a same side as the embedded circuit layer and is electrically connected to the embedded circuit layer. The second circuit build-up structure is disposed on the core layer on a same side as the signal transmission portion, and is electrically connected to the first circuit build-up structure through the signal transmission portion and the embedded circuit layer.