Semiconductor package carrier board structure and manufacturing method thereof
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Solution Overview
Problem
Conventional semiconductor package structures face issues with double-sided etching processes that leave substrates bare, requiring additional bracket connections and leading to electrode detachment, limited design capability, and increased processing complexity.
Innovation Solution
A semiconductor package carrier board structure with unilateral secondary etching, where dielectric materials are formed on one side of the substrate and the other side is etched through, forming conductive pillars with increased contact area and stability, using a double-sided etching process without etching through the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If double-sided half-etching is performed on the substrate, then circuit layers and conductive pillars are formed, but the substrate is left bare requiring additional bracket connections and causing electrode detachment
Solution Approach 1:
The patent applies local quality by selectively filling only certain etched regions with dielectric material while leaving other regions with conductive material exposed. Specifically, first openings are filled with first dielectric material and second openings are filled with second dielectric material, creating locally differentiated structures that provide both circuit formation and electrode protection in different areas of the substrate
Solution Approach 2:
The patent uses composite materials by combining multiple dielectric materials (first dielectric material and second dielectric material with different properties) and conductive materials (copper, copper alloy, or nickel alloy substrate) to create a multi-material structure. This composite approach allows optimization of different regions for different functions: circuit conductivity in some areas and electrode protection in others
2Ease of manufacture
If double-sided etching is performed through the substrate, then conductive pillars are formed, but the process is complex and requires additional bracket connections
Solution Approach 1:
The patent segments the etching process into distinct stages: first etching to form initial openings, then selective filling with dielectric materials, and finally a second etching step to form additional openings. This segmentation allows each step to be optimized independently and simplifies the overall process control compared to traditional through-etching methods
Solution Approach 2:
The patent applies preliminary action by filling the first openings with dielectric material before completing the etching process. This preliminary filling creates a protective and structural foundation that simplifies subsequent etching steps and eliminates the need for additional bracket connections that would be required in traditional through-etching approaches
3Ease of manufacture
If the substrate is left bare after etching, then manufacturing is simplified, but design capability is limited and additional bracket connections are required
Solution Approach 1:
The patent applies local quality by creating regions with different material properties: some areas have exposed conductive material for electrical connections, while other areas have dielectric material filling for structural support and design flexibility. This local differentiation enables diverse package designs while maintaining manufacturing simplicity
Solution Approach 2:
The patent achieves universality by creating a substrate structure that can serve multiple functions simultaneously: the same etched and filled structure provides both electrical connectivity through exposed conductive regions and structural support through dielectric-filled regions, enabling a single manufacturing process to support multiple package designs
Data Source
AI summary
A semiconductor package carrier board structure is provided and includes a substrate body, a first dielectric material, and a second dielectric material. The substrate body has a first surface, a second surface opposite to the first surface, a plurality of first openings recessed from the first surface, a plurality of second openings recessed from the second surface, and a plurality of third openings. Two ends of the plurality of third openings are connected to the plurality of first openings and the plurality of second openings. The plurality of first openings are filled with the first dielectric material. The plurality of second openings and the plurality of third openings are filled with the second dielectric material. A method of manufacturing the semiconductor package carrier board structure is further provided.