Printed Circuit Aspects TRIZ Cases

A recessed plated-via structure wraps a lower-conductivity portion to strengthen interlayer bonding and improve substrate durability.

A skeletonized intermediate board zone slows thermal migration, preventing condensation on non-cryogenic components near cryogenically cooled chips.

Metal paste filling and staged heating form flat conductive vias without plating or CMP, reducing work time and cracking risk.

A planar transformer embedded in the support substrate senses current near the chip, cutting PCB area use and magnetic interference.

Dual plated-and-paste vias improve small-diameter, narrow-pitch interlayer connections while reducing insertion loss in multilayer boards.

Segmented through-hole wall sections with dielectric columns tune PCB via impedance to cut signal reflection and preserve high-speed signal integrity.

A notched sensor substrate and bent flexible PCB compactly align the light source and dual optical sensors for wearable biometric detection.

Metallized housing contact areas solder two PCBs into a compact sandwich assembly, replacing plugs and sockets to save space and simplify modular design.

An embedded hot-melt fuse inside the PCB blows before cabling layers, stopping short-circuit heating that can carbonize the board and cause fire.

A three-stage via hole profile improves plating solution penetration, reducing voids, cracks, and delamination in dense wiring substrates.

Separate nodes for same-function terminals let one PCB support different semiconductor devices without changing peripheral circuitry.

Selective oxide thinning in the through hole preserves metal support protection while maintaining low-resistance conductive contact.

A bilayer inorganic-organic insulating film improves PCB adhesion, lowers roughness, and helps prevent shorts and migration in thin layers.

Non-woven inorganic fabric with low-density resin enables thin PCB dielectric layers with lower CTE, high Tg, and reduced insertion loss.

Recessed mounting and polymer overmolding secure fabric-mounted electronics and conductive strands against bending and stretching.

A latch-and-clamp retrofit adds card retention to existing PCBs without blocking test fixture access, improving support and service life.

Direct imaging creates mesh-like sidewall roughness that improves conductor-insulator adhesion while preserving flat, precise fine wiring.

Metal discharge elements tied to internal ground tracks create distributed ESD paths that protect PCB components without external shielding.

A T-shaped interposer uses vias to link small bottom pads to larger top pads, saving motherboard space while preserving SiP fan-out connections.

A flexible annular substrate co-locates the battery, light source, and photodiodes to shrink housing size while improving biometric signal quality.

An opaque filling layer and raised PCB structure cover exposed conductive patterns to suppress reflection and interference in LED displays.

Selective dielectric filling and unilateral secondary etching stabilize conductive pillars, reduce electrode detachment, and simplify carrier board fabrication.

Laser-formed connection lines bridge display panel and FPC pads, easing alignment and preventing shorts in high-resolution bonding.

Optimized plated and paste via height ratios cut interlayer conductor resistance in multilayer boards while preserving manufacturability.