Via Hole Geometry in Wiring Substrates to Prevent Voids
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Solution Overview
Problem
Existing wiring substrates face issues with cracks and delamination between via conductors and conductor layers due to voids and unfilled portions in the via conductor holes, which can lead to defects such as open failures and increased electrical resistance.
Innovation Solution
The wiring substrate design includes via conductor holes with specific width variations, featuring a first portion decreasing in width, a second portion increasing in width, and a third portion decreasing in width, facilitating easy plating solution penetration and preventing void formation, thereby enhancing the connection between conductor layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If via conductor holes are formed with uniform width, then manufacturing is simple, but voids and unfilled portions occur leading to cracks and delamination
Solution Approach 1:
The hole is designed with non-uniform width featuring a narrow portion near the first conductor layer and a wide portion near the second conductor layer. This local variation in geometry allows the hole to adapt to different requirements at different locations: the narrow portion prevents voids and ensures reliable plating solution penetration near the first conductor layer, while the wide portion facilitates easy formation and prevents delamination near the second conductor layer.
Solution Approach 2:
The hole is segmented into distinct portions with different width characteristics: a first portion with narrow width near the first conductor layer, and a second portion with wide width near the second conductor layer. This segmentation allows each portion to serve its specific function independently, resolving the contradiction between manufacturing simplicity and connection reliability.
2Reliability
If via conductor holes are made wide to prevent delamination, then connection reliability improves, but voids and unfilled portions increase causing cracks
Solution Approach 1:
The hole geometry is optimized with local quality variations: the narrow portion near the first conductor layer prevents void formation by ensuring complete plating solution penetration, while the wide portion near the second conductor layer prevents delamination. This localized differentiation allows the hole to simultaneously avoid both harmful effects.
Solution Approach 2:
Instead of maintaining uniform width throughout, the hole inverts the conventional approach by having the narrowest portion at the location most prone to voids (near the first conductor layer) and the widest portion at the location most prone to delamination (near the second conductor layer). This inverted geometry resolves the contradiction by addressing each problem at its specific location.
3Reliability
If via conductor holes have complex width variations, then void formation is prevented, but manufacturing complexity increases
Solution Approach 1:
The complex hole geometry is segmented into two distinct portions with clear functional differentiation. This segmentation simplifies the manufacturing process by allowing each portion to be formed through standard techniques while achieving the desired void prevention through the narrow portion's geometry.
Solution Approach 2:
The hole exhibits local quality variations that are implemented through standard manufacturing processes. The narrow portion and wide portion are created using conventional plating and formation techniques, avoiding the need for complex specialized equipment while still achieving void prevention through the designed geometry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces the likelihood of cracks and delamination, allowing for fine wiring patterns and high-density connections without defects, ensuring reliable electrical conductivity.
Implementation Method 1
The insulating layer is formed such that the hole includes a first portion decreasing in width on the first conductor layer side, a second portion formed on the first conductor layer side of the first portion and increasing in width on the first conductor layer side, and a third portion formed on the first conductor layer side of the second portion and decreasing in width on the first conductor layer side.
Data Source
AI summary
A wiring substrate includes a first conductor layer, an insulating layer covering the first conductor layer, a second conductor layer formed on a surface of the insulating layer, and a via conductor formed in a hole penetrating through the insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer. The insulating layer is formed such that the hole includes a first portion decreasing in width on the first conductor layer side, a second portion formed on the first conductor layer side of the first portion and increasing in width on the first conductor layer side, and a third portion formed on the first conductor layer side of the second portion and decreasing in width on the first conductor layer side.