Conductive Via Paste Filling for Flat Wiring Board Substrates
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Solution Overview
Problem
Existing methods for manufacturing substrates with conductive vias face challenges such as extended processing times due to controlled copper plating, decreased productivity from chemical mechanical polishing, and risks of substrate cracking.
Innovation Solution
A method involving a metal paste containing metal particles and a volatile solvent is applied to fill substrate holes, followed by heating to remove solvent, exposing a flattened surface, and firing to form conductive vias, with specific concentrations and heating conditions to ensure flatness and connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If copper plating is performed to form through-silicon vias, then conductive vias are formed, but work time is extended and productivity decreases
Solution Approach 1:
The invention changes the physical state and composition parameters of the filling material from liquid copper plating to powder-based metal paste. The metal paste contains metal particles (94-99 mass%), organic vehicle (5-10 mass%), and solvent (1-5 mass%), transforming the deposition process into a powder application followed by thermal processing rather than continuous liquid plating.
Solution Approach 2:
The invention utilizes phase transitions of the solvent and metal particles during thermal processing. The solvent evaporates (liquid to gas phase transition) during heating at 50-150°C, and the metal particles sinter together (solid to denser solid phase transition) during firing at 100-500°C, forming the final conductive via structure without requiring extended plating time.
2Manufacturing precision
If chemical mechanical polishing is performed for planarization, then flatness is improved, but productivity decreases and substrate cracking risk increases
Solution Approach 1:
The invention performs preliminary action by controlling the metal paste to naturally flatten during the heating and firing process itself. The metal particles settle and sinter in a way that creates a flat surface profile, so the planarization effect is achieved as an inherent part of the via formation process rather than requiring a separate subsequent polishing step.
Solution Approach 2:
The invention extracts and eliminates the separate chemical mechanical polishing step from the manufacturing process. By designing the metal paste properties (particle size distribution, organic vehicle composition, solvent type) to inherently produce flat surfaces during thermal processing, the patent removes the need for the CMP process entirely, thereby eliminating its associated time consumption and cracking risks.
3Manufacturing precision
If metal paste concentration is increased to reduce solvent content, then volume shrinkage is reduced, but paste viscosity increases and application becomes difficult
Solution Approach 1:
The invention applies local quality by using different types of solvents with varying volatility characteristics in specific regions of the paste formulation. The organic vehicle and solvent are selected to provide appropriate flow characteristics for application, while the metal particle concentration is optimized locally within the paste matrix to achieve the desired balance between fillability and shrinkage control during thermal processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of substrates with conductive vias having sufficient flatness and connectivity, eliminating the need for planarization steps and enhancing productivity by reducing volume shrinkage and cracking risks.
Implementation Method 1
a step b of heating the metal paste portion to remove a part of the volatile solvent
Implementation Method 2
a step d of firing the conductive via precursors
Data Source
AI summary
A method for manufacturing a substrate with conductive vias includes a step a of preparing a substrate provided with holes, and providing a metal paste portion containing metal particles and a volatile solvent so as to fill the inside of the holes and cover at least a surface of the substrate around the holes; a step b of heating the metal paste portion to remove a part of the volatile solvent; a step c of removing a part of the metal paste portion after heating so as to expose the surface, and forming conductive via precursors having a flattened exposed surface and containing a remainder of the metal particles and the volatile solvent inside the holes; and a step d of firing the conductive via precursors to form conductive vias.


