Carrier Device With Ridge-Shaped Contacts For Thermal Stress
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Solution Overview
Problem
The challenge lies in finding substrate materials for semiconductor chips that match the coefficient of thermal expansion (CTE) while being electrically insulating and having good thermal conductivity, as existing materials like aluminum nitride are expensive and prone to mechanical issues due to CTE mismatch, especially in large modules and under thermal cycling.
Innovation Solution
A carrier device with an electrically insulating layer, such as a plastic material or anodically oxidized metal, and a ridge-shaped contact region that allows for elastic mobility, reducing mechanical stresses and enabling effective heat dissipation by varying the distance between contact regions, thus accommodating different CTEs between the chip and substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ceramic substrate materials like aluminum nitride are used to match CTE, then thermal conductivity and CTE matching are improved, but cost increases significantly
Solution Approach 1:
The patent replaces expensive ceramic substrates (aluminum nitride) with a more economical alternative structure consisting of a metal core printed circuit board with a specific layer construction. This substitution uses readily available, cost-effective materials while maintaining the necessary thermal and mechanical properties through clever structural design rather than relying on expensive bulk ceramic materials.
Solution Approach 2:
The patent employs a composite structure comprising multiple layers with different functions: a metal core layer for thermal management, dielectric layers for electrical insulation, and copper traces for electrical connection. This composite approach allows each layer to be optimized independently for its specific function, achieving overall system performance comparable to expensive monolithic ceramic substrates but at much lower cost.
2Temperature
If aluminum nitride ceramic substrates are used for good thermal conductivity, then thermal dissipation is improved, but mechanical ductility decreases leading to panel fracture
Solution Approach 1:
The patent introduces a flexible organic solderable substrate layer that acts as a compliant interface between the rigid metal core and the semiconductor chip. This thin film structure provides the necessary mechanical flexibility and ductility to prevent panel fracture while maintaining effective thermal pathways through the metal core, thus resolving the contradiction between thermal performance and mechanical brittleness.
Solution Approach 2:
The patent changes the material parameters of the substrate system by using a metal core with high thermal conductivity combined with a flexible organic substrate, rather than relying on the inherent brittleness of ceramic materials. This parameter change in material selection and structural configuration maintains thermal dissipation effectiveness while dramatically improving mechanical ductility and resistance to panel fracture.
3Ease of manufacture
If metal core printed circuit boards are used to reduce cost, then production cost is reduced, but CTE mismatch increases causing mechanical stress
Solution Approach 1:
The patent introduces a dielectric layer with intermediate thermal and mechanical properties between the high-CTE metal core and the low-CTE semiconductor chip. This intermediary layer acts as a stress buffer that accommodates the CTE mismatch, preventing excessive mechanical stress and deformation while allowing the use of cost-effective metal core substrates instead of expensive CTE-matched ceramic materials.
Solution Approach 2:
The patent modifies the thermal-mechanical parameters of the overall substrate system by carefully selecting and combining materials with complementary properties. The metal core provides high thermal conductivity and low cost, while the dielectric and organic substrate layers provide CTE buffering and mechanical compliance, achieving an optimal balance between cost, thermal performance, and stress management that neither material could achieve alone.
4Area of stationary object
If the substrate area is made larger than the chip area, then mounting area is increased, but CTE mismatch problem shifts to the substrate-mounting area interface
Solution Approach 1:
The patent uses the flexible organic solderable substrate layer to extend the mounting area beyond the chip footprint while maintaining mechanical compliance throughout the entire substrate structure. This flexible film can accommodate CTE differences across large areas without generating excessive stress, allowing the mounting area to be significantly larger than the chip area while distributing and managing thermal-mechanical stresses effectively across the entire interface.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution minimizes mechanical stresses and enhances heat dissipation, allowing for reliable and cost-effective mounting of semiconductor chips on substrates with mismatched CTEs, reducing the risk of failure under thermomechanical loads and lowering production costs.
Implementation Method 1
anodically oxidized metal or semimetal foil, for example from anodically oxidized silicon or aluminum
Implementation Method 2
good dissipation of heat
Data Source
AI summary
A carrier device for an electrical component includes a carrier, which includes an electrically insulating layer, and an electrical contact layer on the electrically insulating layer The electrical contact layer includes at least one bridge-shaped contact region At least one recess in the electrically insulating layer is arranged at least on one side surface of the bridge-shaped contact region and/or the bridge-shaped contact region includes a bridge width reducing toward the insulating layer.


