Carrier Wafer Capacitor for Image Sensor Space
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Solution Overview
Problem
Conventional imaging systems face space constraints on printed circuit substrates due to the accommodation of circuit elements like capacitors, limiting the available space for other circuitry near image sensor packages.
Innovation Solution
Incorporating circuit components, such as capacitors, into carrier wafers using a silicon substrate with serpentine patterned trenches, dielectric layers, and conductive vias to maximize surface area and capacitance without requiring extensive space, and bonding these wafers to image sensor wafers for efficient electrical coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If circuit elements such as capacitors are accommodated on the printed circuit substrate, then the imaging system can function properly with necessary circuitry, but the amount of space available on the printed circuit substrate for other circuitry is reduced
Solution Approach 1:
The patent merges the carrier wafer and circuit elements into a single integrated structure. The carrier wafer is bonded directly to the image sensor wafer, and circuit elements are formed on the carrier wafer's front surface, eliminating the need for separate printed circuit substrate mounting and freeing up space while maintaining circuit functionality.
Solution Approach 2:
The patent utilizes the third dimension by forming circuit elements on the front surface of the carrier wafer, which is bonded to the back-illuminated image sensor wafer. This vertical integration allows circuit elements to occupy space that would otherwise be unavailable on a traditional planar printed circuit substrate, effectively adding a new dimensional layer for circuit placement.
2Area of stationary object
If more circuit elements are integrated into the carrier wafer, then space utilization is improved, but the complexity of manufacturing the carrier wafer increases
Solution Approach 1:
The carrier wafer is designed to serve multiple functions simultaneously: it provides mechanical support for the back-illuminated image sensor wafer, acts as a substrate for forming circuit elements, and enables electrical connections through through-silicon vias. This multi-functionality reduces the need for separate components and simplifies the overall manufacturing process despite the integrated complexity.
Solution Approach 2:
The manufacturing process is segmented into distinct stages: forming circuit elements on the carrier wafer front surface, creating through-silicon vias, bonding the carrier wafer to the image sensor wafer, and filling vias with conductive material. This segmentation allows each manufacturing step to be optimized independently, managing complexity while achieving high integration.
Data Source
AI summary
An imaging system may include an image sensor package with an image sensor wafer mounted on a carrier wafer, which may be a silicon substrate. A capacitor may be formed in the carrier wafer. Trenches may be etched in a serpentine pattern in the silicon substrate. Conductive plates of the capacitor may be formed at least partially in the trenches. An insulator material may be formed between the capacitor and the silicon substrate. A dielectric layer may be formed between the conductive plates of the capacitor. The image sensor package may be mounted on a printed circuit board via a ball grid array. Conductive vias may electrically couple the capacitor and the image sensor wafer to the printed circuit board.