In-Memory Computing Cells Using Cascaded Strings for Low-Power Logic
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Solution Overview
Problem
Memory devices for in-memory computing face challenges with high circuit complexity and power consumption when performing logic operations, which negatively impact artificial intelligence technology.
Innovation Solution
A memory device architecture featuring cascaded computing cells with distinct threshold voltages and logic circuits that perform specific logic operations, reducing circuit complexity and power consumption by using series-connected first and second computing memory cell strings to execute XNOR, XOR, XNAND, and XAND operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the memory device executes logic operations using conventional memory architectures, then logic operations can be performed, but circuit complexity increases
Solution Approach 1:
The memory device is segmented into multiple computing memory cell strings (first computing memory cell string and second computing memory cell string), each capable of performing specific logic operations independently. This segmentation allows the device to perform multiple logic operations (XNOR, XOR, XNAND, XAND) using dedicated cell strings, thereby reducing the overall circuit complexity compared to a monolithic architecture that would require additional logic circuits.
2Adaptability or versatility
If the memory device executes logic operations using conventional memory architectures, then logic operations can be performed, but power consumption increases
Solution Approach 1:
The computing memory cells perform logic operations using their inherent memory cell structures and threshold voltage characteristics without requiring external logic circuits. The cells utilize their own physical properties (threshold voltages Vt1, Vt2, Vt3, Vt4) to execute logic operations, making the memory device self-sufficient for computing tasks and eliminating the need for additional power-consuming logic circuitry.
3Measurement precision
If computing memory cells with multiple threshold voltages are used, then logic operation precision improves, but device complexity increases
Solution Approach 1:
The computing memory cells utilize multiple threshold voltage parameters (Vt1, Vt2, Vt3, Vt4) to enable different logic operation modes. By changing the threshold voltage parameters of the memory cells, the device can perform various logic operations (XNOR, XOR, XNAND, XAND) with high precision. This parameter-based approach avoids the need for complex circuit structures, as the diversity is achieved through parameter variation rather than structural complexity.
Data Source
AI summary
An in-memory-computing method for a memory device includes: storing weight values in cascaded computing cells each including first and second computing memory cells, wherein the first computing memory cells are cascaded in series into a first computing memory cell string and the second computing memory cells are cascaded in series into a second computing memory cell string: receiving input values by the first and the second computing memory cell strings; performing a first logic operation on the input values and the weight values by the first computing memory cell string to generate a first logic operation result, and performing a second logic operation on the input values and the weight values by the second computing memory cell string to generate a second logic operation result: and performing a third logic operation on the first and the second logic operation results to generate an output logic operation result.