Cascaded Supercascode Power Switches for Balanced MV Switching

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Solution Overview

Problem

The widespread adoption of medium voltage high current (MV-HC) switches is limited due to dynamic performance issues from paralleling high voltage low current semiconductors, high costs associated with low yield and expensive materials, and the lack of commercially available medium and high-voltage devices.

Innovation Solution

The development of cascaded supercascode power switches (CSCPS) using self-triggering, serially connected SiC JFETs with a single serial Si MOSFET, which reduces the need for individual gate drive signals and equalizes voltage stress, allowing for scalable and efficient high voltage switching with improved performance and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stress or pressure

If high voltage low current semiconductors are paralleled to achieve medium voltage high current switching, then the voltage rating is improved, but the dynamic performance deteriorates

Engineering Contradiction:
Improvevoltage ratingVSAvoiddynamic performance
Core Design Contradiction:
Stress or pressureVSReliability

Solution Approach 1:

The patent divides the high voltage switching function into multiple series-connected low-voltage semiconductor devices (e.g., four 1.2kV SiC MOSFETs in series to achieve 4.8kV switching). Each device operates within its optimal voltage range, maintaining dynamic performance while achieving the required overall voltage rating through series segmentation rather than parallel connection.

Inventive Principle:
Principle #1Segmentation

2Power

If commercially available MV-HC modules are used, then the voltage and current ratings are improved, but the cost increases due to low yield and expensive materials

Engineering Contradiction:
Improvevoltage and current ratingVSAvoidcost
Core Design Contradiction:
PowerVSEase of manufacture

Solution Approach 1:

The patent changes the operating parameters by using series connection of standard-voltage devices instead of requiring custom high-voltage modules. This allows use of commercially available, lower-cost semiconductor devices with higher manufacturing yields, while achieving the required medium voltage rating through parameter combination (series connection) rather than requiring expensive specialized high-voltage components.

Inventive Principle:
Principle #35Parameter changes

3Stress or pressure

If individual gate drive signals are used for each semiconductor in series connection, then the voltage stress is equalized, but the device complexity increases

Engineering Contradiction:
Improvevoltage stress distributionVSAvoidgate drive circuit complexity
Core Design Contradiction:
Stress or pressureVSDevice complexity

Solution Approach 1:

The patent merges multiple individual gate drive signals into a single gate drive signal that controls all series-connected semiconductors simultaneously. The intrinsic gate-to-source capacitance of each device and the series connection topology naturally ensure equal voltage stress distribution, eliminating the need for complex individual gate drive circuits while maintaining proper voltage sharing across all devices.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11784641B2High voltage cascaded supercascode power switch
Publication Date: 2023.10.10 NORTH CAROLINA STATE UNIV
  • US11784641B2 patent drawing
  • US11784641B2 patent drawing
  • US11784641B2 patent drawing

AI summary

Various examples are provided related to supercascode power switches that can be used in, e.g., HV and MV applications. This disclosure introduces a cascaded supercascode (CSC) power switch which can include a series of unit supercascode (USC) circuits; a control switch coupled in series with the series of USC circuits; and an external balancing network coupled to each of the n USC circuits. The series has a plurality of USC circuits, with each of the USC circuits including first and second switches coupled in series and an internal balancing network coupled across the first and second switches. A source of each of the USC circuits is a source of the first switch. The internal balancing network can include a capacitor connected between a gate of the second switch and the source of the first switch and a diode connected in parallel with the capacitor.