Cascode Differential Power Amplifier for Higher Output Voltage
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Solution Overview
Problem
Existing power amplifier circuits in mobile communication devices face limitations in maximizing output power due to the collector-base withstand voltage of transistors, requiring booster conversion circuits to increase the power supply voltage, which in turn increases the circuit scale.
Innovation Solution
A power amplifier circuit design incorporating a lower-stage and upper-stage differential amplifying pair, with cascode-connected transistors and specific inductor and capacitor configurations, allowing for increased output power without substantial increases in circuit scale by effectively quadrupling the collector voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the power supply voltage is increased to boost maximum output power, then the maximum output power is improved, but the collector-base withstand voltage of the transistor is exceeded
Solution Approach 1:
The power amplifier circuit is divided into a first power amplifier circuit and a second power amplifier circuit, each handling different power levels. The first power amplifier circuit operates at lower power with lower voltage requirements, while the second power amplifier circuit operates at higher power. This segmentation allows the system to achieve high maximum output power without requiring any single transistor to withstand excessive voltages, thus resolving the contradiction between power output and voltage withstand requirements.
2Power
If a booster conversion circuit is added to increase the power supply voltage above maximum battery voltage, then the maximum output power is improved, but the circuit scale is increased
Solution Approach 1:
The power supply voltage is made dynamic rather than static. A power supply voltage adjustment circuit is employed to dynamically adjust the power supply voltage based on operating conditions. During normal operation, the voltage is maintained at standard levels, but when high power output is required, the voltage is dynamically increased. This dynamic approach eliminates the need for a separate booster conversion circuit while still achieving the required voltage levels for high power operation.
3Power
If the power supply voltage is increased to quadruple the collector voltage, then the output power is increased four-fold, but the circuit scale is substantially increased
Solution Approach 1:
The power amplification function is segmented across two separate power amplifier circuits operating at different power levels. The first power amplifier circuit handles lower power operations with standard voltage levels, while the second power amplifier circuit handles high power operations. This segmentation enables the system to achieve four-fold output power increase through the combined operation of both circuits rather than requiring a single circuit with quadrupled voltage, thus avoiding substantial increases in circuit scale.
Solution Approach 2:
The system dynamically switches between the first and second power amplifier circuits based on the required output power level. For low to medium power requirements, only the first power amplifier circuit is activated, maintaining compact circuit operation. When high power output is needed, the second power amplifier circuit is activated to provide the additional power. This dynamic operation allows the system to achieve high maximum output power without continuously operating all components at maximum capacity, thereby controlling the effective circuit scale.
Data Source
AI summary
A power amplifier circuit includes lower-stage and upper-stage differential amplifying pairs, a combiner, first and second inductors, and first and second capacitors. First and second signals are input into the lower-stage differential amplifying pair. The upper-stage differential amplifying pair outputs first and second amplified signals. The combiner combines the first and second amplified signals. The lower-stage differential amplifying pair includes first and second transistors. A supply voltage is supplied to the collectors of the first and second transistors. The first and second signals are supplied to the bases of the first and second transistors. The upper-stage differential amplifying pair includes third and fourth transistors. A supply voltage is supplied to the collectors of the third and fourth transistors. The emitters of the third and fourth transistors are grounded via the first and second inductors and are connected to the first and second transistors via the first and second capacitors.