Cascode Composite Switch Circuit for Reverse Recovery Power Loss
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Solution Overview
Problem
The existing cascode structures of junction field effect transistor (JFET) and metal oxide semiconductor field effect transistor (MOSFET) in high voltage applications suffer from significant power loss during the reverse recovery phase due to charging of internal capacitors by a high voltage supply, leading to inefficient energy discharge.
Innovation Solution
A composite switch circuit is designed with a normally-on power switch device and a normally-off power switch device in cascode configuration, utilizing a low voltage biasing of the common connection between the devices during the reverse recovery process, controlled by a bias switch activated when the body diode of the normally-off device conducts, reducing power loss by shifting the discharge current to a low voltage supply.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a high voltage supply charges the internal capacitors at the middle node during reverse recovery, then the capacitors are fully charged to the high voltage level, but significant power loss occurs during energy discharge
Solution Approach 1:
The patent changes the voltage parameter from high voltage to low voltage by introducing a bias switch that connects the middle node to a low voltage supply during reverse recovery. This parameter change reduces the energy stored in capacitors (E=1/2CV^2) and consequently reduces power loss during discharge, directly resolving the technical contradiction between energy storage and power loss
Solution Approach 2:
The patent introduces a bias switch as an intermediary component between the high voltage supply and the middle node. This intermediary selectively connects the middle node to either the high voltage supply or a low voltage supply during different operation phases, enabling controlled charging that minimizes energy loss while maintaining proper device operation
2Reliability
If the middle node voltage rises above the JFET pinch off voltage during MOSFET off state, then all internal capacitors at the middle node are charged, but this charging process from high voltage supply results in power loss
Solution Approach 1:
The patent applies preliminary action by proactively connecting the low voltage supply to the middle node through the bias switch before the high voltage charging occurs during reverse recovery. This preliminary low voltage charging prepares the capacitors in advance, reducing the subsequent energy loss when high voltage charging is necessary, while ensuring reliable capacitor charging is achieved
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly reduces power loss by minimizing the energy stored in capacitors, achieving lower energy discharge and improved efficiency in high voltage applications.
Implementation Method 1
when the body diode of the normally-off power switch device conducts
Implementation Method 2
all the internal capacitors at the node md would be charged
Data Source
AI summary
A composite switch circuit having a normally-on power switch device and a normally-off power switch device in cascode configuration is discussed. The composite switch circuit is with reduced power loss by biasing a common connection of the source terminal of the normally-on power switch device and the drain terminal of the normally-off power switch device with a low voltage supply during a reverse recovery process of the composite switch circuit.