Biasing Cascode Transistors for Wide Voltage Range Operation

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Solution Overview

Problem

Designing input/output buffer circuits that operate across a wide range of supply voltages is challenging due to stress and damage risks to transistors, especially when the higher supply voltage varies, leading to complications in signal level shifting and reduced driver current, which affects speed and introduces glitches during power ramping.

Innovation Solution

The output buffer circuit employs a bias voltage generator circuit that dynamically adjusts bias voltages based on the supply voltage, using a threshold voltage to set reference voltages that remain constant across varying supply voltages, ensuring consistent gate-to-source voltage and reducing transistor stress, thereby supporting a wide voltage range and glitch-free operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the input/output buffer circuit is powered from a higher supply voltage to enable level shifting, then the signal level shifting capability is improved, but the transistor stress and damage risk increases

Engineering Contradiction:
Improvesignal level shifting capabilityVSAvoidtransistor stress and damage risk
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The bias voltage generator circuit dynamically adjusts the bias voltage applied to cascode transistor gates based on the actual supply voltage level. When supply voltage exceeds a threshold, the circuit transitions from a fixed bias mode to a dynamic mode where bias voltage is reduced proportionally, preventing transistor stress while maintaining level shifting capability across varying supply conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the bias voltage parameter dynamically based on supply voltage conditions. The bias voltage generator monitors supply voltage and adjusts the bias voltage applied to cascode transistors accordingly - maintaining full bias voltage when supply is below threshold, and reducing bias voltage when supply exceeds threshold, thereby adapting transistor operating parameters to prevent damage

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the supply voltage varies over a range to support multiple voltage levels, then the voltage adaptability is improved, but the circuit design complexity increases

Engineering Contradiction:
Improvevoltage level adaptabilityVSAvoidcircuit design complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The bias voltage generator circuit automatically monitors the supply voltage and self-adjusts the bias voltage applied to cascode transistors without external control signals or complex switching logic. The circuit uses inherent voltage comparison and automatic regulation to adapt to different supply voltage levels, eliminating the need for manual configuration or complex control mechanisms

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The bias voltage generator circuit serves multiple functions: it acts as a voltage monitor, a regulator, and a bias source simultaneously. This single multi-functional block enables the output buffer to operate across wide supply voltage ranges while maintaining proper transistor biasing, replacing what would otherwise require multiple separate control circuits

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Power

If higher supply voltage levels are used to increase driving capability, then the driver current is improved, but the transistor stress increases

Engineering Contradiction:
Improvedriver currentVSAvoidtransistor stress
Core Design Contradiction:
PowerVSObject-affected harmful factors

Solution Approach 1:

The invention dynamically adjusts the bias voltage parameter based on supply voltage conditions. When supply voltage exceeds the threshold, the bias voltage to cascode transistors is reduced proportionally, maintaining appropriate voltage margins and preventing transistor stress while allowing the drive transistors to operate at higher currents for increased driving capability

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10454466B1Biasing cascode transistors of an output buffer circuit for operation over a wide range of supply voltages
Publication Date: 2019.10.22 STMICROELECTRONICS INT NV
  • US10454466B1 patent drawing
  • US10454466B1 patent drawing
  • US10454466B1 patent drawing

AI summary

An output stage of an output buffer circuit includes a first drive transistor and a first cascode transistor (coupled in series between a first supply node and an output node) and a second drive transistor and a second cascode transistor (coupled in series between the output node and a second supply node). Gates of the first and second cascode transistors are biased with first and second bias voltages, respectively. The first bias voltage equals the first supply voltage at the first supply node when the first supply voltage is less than a threshold, and is fixed at a fixed voltage for any first supply voltage exceeding the threshold voltage. The second bias voltage equals a fixed voltage when the first supply voltage is less than a threshold voltage, and is offset from the first supply voltage by a fixed difference for any first supply voltage exceeding the threshold.