Display Substrate Cathode Routing for Ultra-Narrow Frames
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Solution Overview
Problem
The challenge is to reduce the frame width of display products to enhance user experience and commercial value by minimizing the display screen frame and seam issues between multiple screens, particularly in large-size and ultra-high-definition displays.
Innovation Solution
A display substrate design with a cathode, driver chips, and power signal line patterns strategically positioned to occupy minimal non-display area, including integral fan-out lines and power signal lines that extend in specific directions to minimize frame width, and an electrostatic discharge circuit to improve performance and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the display screen frame is made larger to accommodate power signal line patterns and driver chips, then the electrical connection and component placement are improved, but the frame width increases and the screen-to-body ratio decreases
Solution Approach 1:
The power signal line pattern transitions from a planar layout to a three-dimensional structure by extending in multiple directions (first direction parallel to display area side, second direction intersecting the first direction). This spatial optimization allows the pattern to accommodate electrical connection requirements while minimizing the frame width occupation.
Solution Approach 2:
The power signal line pattern is divided into distinct segments: a first transmission portion extending in the first direction parallel to the display area side, and a second transmission portion extending in the second direction intersecting the first direction. This segmentation allows optimized routing that reduces overall frame width while maintaining electrical connectivity.
2Length of stationary object
If the power signal line pattern extends in multiple directions to reduce frame width, then the screen-to-body ratio is improved, but the electrical connection reliability may be compromised
Solution Approach 1:
The power signal line pattern utilizes multi-directional extension (first direction parallel to display area, second direction intersecting) to optimize space utilization. This dimensional approach reduces frame width occupation while maintaining adequate electrical connection pathways through strategic routing in different spatial directions.
Solution Approach 2:
The power signal line pattern is pre-configured with transmission portions extending in specific directions before final component placement. This preliminary spatial arrangement ensures that electrical connections are established along optimized pathways that minimize frame width while guaranteeing connection reliability.
3Length of stationary object
If the frame width is reduced to enhance visual experience, then the screen-to-body ratio increases, but the space for power signal line patterns and driver chips becomes insufficient
Solution Approach 1:
The power signal line pattern employs multi-directional extension (first direction parallel to display area side, second direction intersecting) to maximize space utilization within the non-display area. This dimensional optimization reduces frame width while maintaining adequate space for driver chip placement and electrical connections.
Solution Approach 2:
The power signal line pattern is strategically positioned in the non-display area with specific portions extending in different directions based on local spatial requirements. This localized optimization allows frame width reduction while preserving necessary component placement space in critical areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the frame width to 5 mm from 10 mm, meeting the requirements for large-size displays with ultra-narrow frames and multiple tiled display panels, while enhancing visual experience and commercial value.
Implementation Method 1
the first power signal line pattern includes a first transmission portion and a first incoming line portion electrically connected to the first transmission portion; and the first transmission portion extends in a first direction, the first transmission portion is electrically connected to the cathode, the first incoming line portion extends in a second direction intersecting with the first direction, and the first incoming line portion is electrically connected to the at least one driver chip
Data Source
AI summary
Provided in the present disclosure are a display substrate and a display device. In the display substrate, at least a portion of a cathode is located in a display region; at least one driver chip is located in a non-display region; a first power supply signal line pattern is located in the non-display region and arranged on at least one side of the display region. The first power supply signal line pattern comprises a first transmission portion and a first wire inlet portion electrically connected to the first transmission portion. The first transmission portion extends in a first direction, and is electrically connected to the cathode. The first wire inlet portion extends in a second direction intersecting with the first direction. The first wire inlet portion is electrically connected to the at least one driver chip.