Programmable CBRAM Operating Window Control

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Solution Overview

Problem

Conventional non-volatile memory technologies, such as flash memory, face limitations in programming current and physical degradation over time, while resistive RAM (ReRAM) and conductive bridging RAM (CBRAM) offer low power and high speed but struggle with intrinsic variations and operational window control.

Innovation Solution

A semiconductor memory device with a programmable impedance element, a register configured to store erase verify, program verify, and read trip point resistance values, and a controller to determine the mode of operation, generating a reference voltage for operations on the programmable impedance element, allowing for adjustable operating window control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional flash memory is used, then non-volatile storage is achieved, but programming current is high and physical degradation occurs over time

Engineering Contradiction:
Improvememory retention and enduranceVSAvoidprogramming current
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the fundamental operating parameters of the memory cell by switching from flash memory mechanisms to CBRAM/ReRAM mechanisms, which use filament formation and dissolution in a solid electrolyte. This enables operation at lower currents while maintaining non-volatile storage capabilities and improving endurance by eliminating the physical degradation issues of flash memory.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the charge trapping mechanism of flash memory with a resistive switching mechanism in CBRAM/ReRAM cells. This substitution eliminates the need for high-voltage programming and reduces programming current requirements while improving retention characteristics.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Speed

If CBRAM/ReRAM is used, then low power and high speed are achieved, but intrinsic variations and operational window control become problematic

Engineering Contradiction:
Improveprogramming speedVSAvoidoperational window control
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent implements dynamic reference voltage adjustment by storing multiple reference voltage values in a register and selecting the appropriate value based on the operational mode. This dynamic adaptation compensates for intrinsic variations in CBRAM/ReRAM cells, enabling precise control of the operational window while maintaining high-speed performance.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses verify operations with stored reference values to feedback-control the programming and reading processes. By comparing cell resistance against stored reference values (erase verify, program verify, read trip point), the system compensates for cell-to-cell variations and achieves precise operational window control.

Inventive Principle:
Principle #23Feedback

3Device complexity

If fixed reference voltage is used, then circuit simplicity is maintained, but adaptability to different operational modes is limited

Engineering Contradiction:
Improvevoltage generation circuitVSAvoidoperational window control
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent adds a temporal dimension to reference voltage generation by storing multiple reference values in a register and selecting them based on operational mode. This approach maintains circuit simplicity while achieving adaptability, as the complexity is moved from continuous voltage adjustment to discrete value selection based on stored data.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent creates copies of reference voltage values and stores them in a register. Instead of generating different reference voltages through complex circuitry, the system copies the same physical storage element (register) to hold multiple reference values, simplifying the voltage generation circuit while enabling operational mode adaptability.

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution provides programmable operating window control, improving retention, endurance, and performance by optimizing the resistance values for ReRAM and CBRAM memory cells, reducing intrinsic variations and extending the operational lifespan.

Implementation Method 1

a voltage generator configured to generate a reference voltage based on the register data, where the reference voltage is used to perform an operation on the programmable impedance element

Methodology Applied
Scientific EffectOhm's Law: Ohm's Law

Data Source

PatentUS9047948B1Programmable window of operation for CBRAM
Publication Date: 2015.06.02 GLOBALFOUNDRIES US INC
  • US9047948B1 patent drawing
  • US9047948B1 patent drawing
  • US9047948B1 patent drawing

AI summary

Structures and methods for control of an operating window of a programmable impedance element are disclosed herein. In one embodiment, a semiconductor memory device can include: (i) a memory array having a programmable impedance element; (ii) a register configured to be programmed with data that represents an erase verify value, a program verify value, and a read trip point resistance value, for the memory array; (iii) a controller configured to determine a mode of operation for the memory array; (iv) a register access circuit configured to read the register to obtain data that corresponds to the mode of operation; and (v) a voltage generator configured to generate a reference voltage based on the register data, where the reference voltage is used to perform an operation on the programmable impedance element corresponding to the mode of operation.