Complementary Dual-Modular Redundancy Memory Cell Error Detection
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Solution Overview
Problem
Conventional SRAM memories experience poor read and write stabilities due to increased process variations and device mismatch, leading to higher error rates and susceptibility to noise, especially at deep sub-micron technologies, where power and stability have become primary design factors, and existing error correction methods are costly in terms of area and complexity.
Innovation Solution
The implementation of a complementary dual-modular redundancy (CDMR) memory cell, which stores complementary data levels in two bitcells and uses a comparator to detect errors, allowing for further error detection and correction techniques, thereby enhancing error tolerance and reducing area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error correction methods (ECC, TMR) are used, then error tolerance is improved, but area overhead and circuit complexity increase significantly
Solution Approach 1:
The memory cell is segmented into two separate storage nodes (Q and QB) that store complementary data values independently. This segmentation allows error detection by comparing the two nodes without requiring complex external correction circuits, as each node can be read and compared separately to detect upsets.
Solution Approach 2:
The invention creates a copy of the data in complementary form (Q and QB nodes storing opposite logic values). By reading and comparing these complementary copies, the system can detect errors without needing complex correction logic, as any discrepancy between the complementary values indicates an upset condition.
2Area of moving object
If device dimensions are scaled down, then density is improved, but read and write stability deteriorate due to process variations and device mismatch
Solution Approach 1:
The invention applies different local qualities to the two storage nodes by storing complementary data values (Q and QB). This allows the system to exploit local variations differently - if one node is affected by process variations or upsets, the complementary node provides a reference that can detect the discrepancy, thereby maintaining stability despite local quality variations.
Solution Approach 2:
The complementary data value is written to the second storage node simultaneously with the primary data value. This preliminary action of storing complementary information in advance enables error detection during the read operation without requiring additional correction steps, as the complementary relationship is already established before any upset can occur.
3Use of energy by moving object
If supply voltage is reduced to lower power consumption, then energy efficiency is improved, but noise margin decreases and susceptibility to radiation effects increases
Solution Approach 1:
The invention implements a feedback mechanism where the complementary storage node provides continuous information about the expected opposite logic value. During read operations, the sense amplifiers compare the actual read value with the expected complementary value, providing feedback that enables error detection even at low voltages where traditional noise margins are reduced.
Solution Approach 2:
The memory cell uses its own complementary storage node to detect errors without requiring external correction circuits. The complementary node essentially serves itself as the reference for error detection, eliminating the need for additional power-consuming correction logic while maintaining reliability at low supply voltages.
Data Source
AI summary
A CDMR memory cell, includes a first bitcell which is used to store a current data level and a second bitcell which is used to store the complementary data level. When a read operation is performed, a comparator compares the data levels read from the two bitcells. If these two levels are not complementary, the comparator outputs an indicator. This indicator serves as an alert that a storage error has, or may have, occurred.


