Clock Data Recovery with Multi-Step Tracking for Large Offsets
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Solution Overview
Problem
Conventional clock and data recovery systems face difficulties in achieving phase lock with frequency offsets beyond a certain range, particularly when dealing with spread spectrum modulated data, due to limited accumulator ranges and sensitivity to initial conditions, which affects jitter tolerance and compatibility with various protocols like SATA and SAS.
Innovation Solution
A clock and data recovery system with a controllable accumulator range, allowing for sub-ranges to be dynamically adjusted, and an adjustable gain in the frequency tracking path to ensure lock across a wide frequency range, thereby accommodating various protocols and reducing the need for user intervention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single loop clock and data recovery system is used, then the device complexity is reduced, but the system cannot achieve phase lock with large frequency offsets beyond ±200 ppm
Solution Approach 1:
The patent divides the clock and data recovery system into two separate loops: a frequency tracking loop that handles large frequency offsets (±5700 ppm for SATA) and a phase tracking loop that handles phase errors and jitter. This segmentation allows each loop to be optimized for its specific function, enabling the system to achieve phase lock with large frequency offsets while maintaining manageable complexity.
2Device complexity
If the accumulator range is limited to a single fixed range, then the device complexity is reduced, but the system becomes sensitive to initial conditions and cannot achieve lock when offset exceeds correctable range
Solution Approach 1:
The patent implements dynamic accumulator range adjustment where the accumulator range is automatically expanded when large frequency offsets are detected and contracted when offsets are small. This dynamic adaptation allows the system to handle various initial conditions and frequency offsets without requiring manual configuration, improving ease of operation while maintaining reasonable device complexity.
3Reliability
If a dual loop clock and data recovery circuit with single accumulator range is used, then the frequency tracking capability is improved, but the system remains sensitive to initial conditions and may fail to achieve phase lock
Solution Approach 1:
The patent adds dynamic accumulator range adjustment to the dual loop system, allowing the accumulator range to expand when large frequency offsets are detected. This dynamic adaptation ensures that the frequency tracking loop can handle large initial offsets while the phase tracking loop can still achieve precise phase lock, making the system robust to various initial conditions.
4Object-affected harmful factors
If spread spectrum clocking modulation is implemented, then electromagnetic emissions compliance is improved, but the jitter tolerance performance degrades due to large frequency offsets
Solution Approach 1:
The patent segments the tracking functions into frequency tracking and phase tracking loops. The frequency tracking loop compensates for the large frequency offsets introduced by spread spectrum modulation, allowing the phase tracking loop to focus on minimizing jitter. This segmentation enables the system to maintain good jitter tolerance performance while supporting spread spectrum clocking for electromagnetic emissions compliance.
Data Source
AI summary
Techniques and apparatus for a clock and data recovery circuit to lock to data having frequency offsets relative to a local clock reference are disclosed. One embodiment includes a multi-step frequency tracking system in which each step is used to track a sub-range of frequency deviation from local clock reference. The frequency tracking sub-range of each step is selected so that the clock and data recovery system is relatively assured of achieving lock when the frequency of the incoming data lies within or is relatively near the frequency tracking sub-range of the selected step. Embodiments may use control signals to select the sub-ranges, and hence guide the frequency tracking portion of the clock and data recovery circuit to operate in a frequency tracking range that is optimized for achieving and maintaining lock.