Correlated Double Sampling Circuit With Feedback Against Output Jump

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Solution Overview

Problem

Correlated double sampling integrating circuits experience increasing output jumps due to 1/f noise and mismatch voltages, which are not effectively eliminated by existing technologies, leading to inaccuracies as the number of integrations increases.

Innovation Solution

Incorporating a feedback module with differential amplifiers and switch units to form negative feedback loops that maintain consistent node signals between integrating and resetting stages, thereby preventing output jumps and eliminating noise caused by 1/f noise and mismatch voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If correlated double sampling technology is used to eliminate 1/f noise and mismatch voltages, then measurement precision is improved, but output jump increases as integration count increases

Engineering Contradiction:
Improvesignal accuracyVSAvoidoutput stability
Core Design Contradiction:
Measurement precisionVSStability of the object's composition

Solution Approach 1:

The patent introduces a feedback mechanism where the output of the integrating circuit is fed back to the sampling circuit through a feedback capacitor. This feedback loop compensates for the output jump by continuously adjusting the sampling process based on the integration result, thereby maintaining output stability while preserving the noise elimination capability of correlated double sampling

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent modifies the sampling circuit parameters dynamically by switching between different sampling modes (first sampling mode and second sampling mode) based on the integration count. When output jump is detected, the system changes the sampling parameters to compensate, thus maintaining measurement precision while preventing output instability

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If integration count increases to improve signal processing accuracy, then measurement precision is improved, but output jump becomes more severe

Engineering Contradiction:
Improvesignal processing accuracyVSAvoidoutput jump
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary correction by introducing a compensation signal before the output jump becomes problematic. The feedback mechanism detects the tendency of output jump and applies compensatory sampling adjustments in advance, preventing the harmful effect from manifesting while allowing increased integration counts for improved accuracy

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If sampling frequency is increased to reduce noise, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvenoise reductionVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent makes the sampling circuit multi-functional by enabling it to operate in different sampling modes (first and second sampling modes) depending on the integration stage. This universal sampling circuit performs both noise reduction through high-frequency sampling and output jump compensation through mode switching, achieving improved measurement precision without proportionally increasing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10395746B2Correlated double sampling integrating circuit
Publication Date: 2019.08.27 SHENZHEN GOODIX TECH CO LTD
  • US10395746B2 patent drawing
  • US10395746B2 patent drawing
  • US10395746B2 patent drawing

AI summary

A correlated double sampling integrating circuit is provided. The circuit includes: a sampling and holding module, an energy storage unit and a feedback module. The sampling and holding module is configured to perform sampling and holding for different input signals. The energy storage unit is configured to store charges corresponding to the input signals upon the sampling and holding to generate node signals, and the feedback module is configured to form a negative feedback loop with the energy storage unit to control node signals at an integrating stage to keep consistent with node signals at a resetting stage and prevent output jump of the correlated double sampling integrating circuit. The correlated double sampling integrating circuit reduces noise, and prevents or weakens output jump of the correlated double sampling integrating circuit caused by the increase of the count of integrations.