Standard Cell Width Substitution for Pin Access Rule Violations
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Design rule violations occur in integrated circuits due to overlapping of circuit cells with pre-route conducting lines, leading to issues with pin access and requiring significant displacement of adjacent cells, which can increase routing wire length, congestion, and power consumption.
Innovation Solution
Substituting narrower circuit cells with wider cells of the same functionality, reducing cascaded displacement of adjacent cells by one Contacted Poly Pitch (CPP), thereby improving layout efficiency and reducing congestion and time delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If narrower circuit cells are used to minimize area, then layout area utilization is improved, but design rule violations occur when cells overlap with pre-route conducting lines
Solution Approach 1:
The patent changes the width parameter of circuit cells from narrow to wide to resolve design rule violations. Specifically, wider cells are substituted for narrower cells in positions that cause overlaps with pre-route conducting lines, thereby eliminating pin access conflicts while maintaining overall layout efficiency
2Reliability
If circuit cells are displaced to avoid overlapping with pre-route conducting lines, then design rule violations are remedied, but routing wire length increases and congestion worsens
Solution Approach 1:
Instead of displacing cells to avoid conducting line overlaps, the patent changes the cell width parameter. By using wider cells, the solution achieves design rule compliance with minimal or no cell displacement, thereby avoiding increased routing wire length and reduced congestion
3Reliability
If wider cells are used to remedy design rule violations, then pin access issues are resolved, but adjacent cell displacement increases
Solution Approach 1:
The patent applies parameter change by substituting narrower cells with wider cells having the same functionality. This approach resolves pin access violations while minimizing cascaded displacement of adjacent cells, as the width increase is localized and controlled rather than requiring broad layout reconfiguration
Data Source
AI summary
An integrated circuit includes a first circuit cell having a first width and a second circuit cell having a second width. The second width is wider than the first width by at least one contacted poly pitch. An equivalent circuit of the first circuit cell is the same as an equivalent circuit of the second circuit cell. The integrated circuit includes a power grid conducting line extending between a first conducting line and a second conducting line. Each of the first conducting line and the second conducting line is connected to a connection pin in the second circuit cell.


