Laminated Ceramic Capacitor Grain Boundary Control
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Solution Overview
Problem
Laminated ceramic capacitors with high dielectric constant fail to adequately suppress crack generation and insulation resistance degradation during moisture-resistance loading tests, leading to decreased performance.
Innovation Solution
Incorporating ceramic layers with perovskite-type compounds like barium titanate or barium calcium titanate, along with secondary-phase grains of 100 nm or more in size and 50 mol % Si content, and controlling the average grain boundary number and size to suppress erosion and cracking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high dielectric constant ceramic layers are used to reduce size and increase capacitance, then capacitance increases, but crack generation and insulation resistance degradation occur during moisture-resistance loading tests
Solution Approach 1:
The invention changes the grain size parameters of secondary-phase grains (controlling them to be 1/4 or more of the ceramic layer thickness) and controls the grain boundary number (greater than 0 and 3.0 or less). These parameter changes in the ceramic microstructure suppress crack generation and progression, thereby maintaining insulation resistance while using high dielectric constant materials for high capacitance.
Solution Approach 2:
The invention uses a composite ceramic structure consisting of main-phase grains (perovskite-type compound containing Ba and Ti) and secondary-phase grains (with Si content of 50 mol % or more per grain). This composite microstructure provides both high dielectric constant for high capacitance and suppressed crack progression for maintained insulation resistance.
2Quantity of substance
If ceramic layers with high dielectric constant are used, then capacitance increases, but crack progression occurs during moisture-resistance loading tests
Solution Approach 1:
The invention changes the grain size parameters of secondary-phase grains (controlling them to be 100 nm or more in average grain size and 1/4 or more of the ceramic layer thickness) and controls the grain boundary number (greater than 0 and 3.0 or less). These parameter changes create a microstructure that suppresses crack initiation and progression, thereby improving crack resistance while maintaining high dielectric constant for high capacitance.
Solution Approach 2:
The invention employs a composite ceramic microstructure with main-phase grains (perovskite-type) and secondary-phase grains (Si-containing with 50 mol % or more Si per grain). This composite structure provides both high dielectric properties for high capacitance and enhanced mechanical strength to suppress crack progression.
Data Source
AI summary
Provided is a laminated ceramic capacitor that can suppress the decrease in insulation resistance after a moisture-resistance loading test. It contains ceramic layers which include: main-phase grains that have a perovskite-type compound containing Ba and Ti and optionally containing Ca, Sr, Zr, and Hf; and secondary-phase grains that have an average grain size of 100 nm or more and have a Si content of 50 mol % or more per grain, the average grain boundary number, represented by (Average Thickness for Ceramic Layers 3)/(Average Grain Size for Main Phase Grains)−1, is greater than 0 and 3.0 or less, and the average grain size for the secondary-phase grains is ¼ or more of the average thickness for the ceramic layers 3.