A sintered dielectric capacitor employs a non-straight wall structure to prevent cracking under thermal stress while maintaining high capacitance.
Nickel-tin plating on connecting electrodes secures ground electrode smoothness, enabling embedding in substrates with limited space.
External electrodes cover end surfaces of multilayer ceramic electronic components to enhance mounting reliability.
Thick film portions on internal electrode exposures enable plating-based external electrodes for laminated ceramic components.
A laminated capacitor wiring structure introduces a supplemental via between power and ground vias to decrease parasitic inductance at high frequencies.
Multi-layer solder structure bonds copper electrodes to metal frames, preventing separation under thermal and mechanical stress.
Z-directed capacitors insert into drilled holes via conductive side channels to boost component density without slowing manufacturing.
Alkyl methacrylate polymer coating on multilayer ceramic electronic components suppresses ion migration and short circuit defects caused by moisture.
Segmented outer electrodes with lateral resin coverage lower ESR and improve crack resistance in multilayer ceramic capacitors.
A multilayer capacitor uses pin hole conducting portions to connect external conductor layers for parallel current flow.
Laser cutting forms flat external electrode ends on multilayer ceramic components, reducing gap deviations between band portions during via drilling.
A multilayer ceramic component uses a magnesium segregation phase to suppress grain growth in thin dielectric layers.
Segmented electrode formation with sputtered side faces reduces thickness without compromising plating resistance.
Direct terminal connections eliminate bus bars in the capacitor module, suppressing equivalent series inductance for efficient switching surge absorption.
Alternating stripe-type inner electrode patterns on ceramic green sheets to maximize overlapping area and capacitance density.
Curved corner geometry in multilayer capacitors prevents warpage from electrode thickness differences while securing moisture resistance reliability.
Copper internal electrodes and exterior voids restore insulation after short-circuits, preventing overheating.
Side-exposed copper electrodes lower inductance and reflect laser light during via formation, preventing electrode damage.
A multilayer ceramic capacitor uses a radial particle size gradient to boost capacitance density.
A ceramic dielectric composition stabilizes permittivity under DC fields to secure high capacitance.
A segmented standoff substrate decouples fabrication constraints to reduce parasitic resistance and inductance in 3D stacked semiconductor packages.
Multilayered electrodes reduce leakage currents by blocking electron injection, enabling higher working voltages and improved energy density.
Segmented interposer grooves and precise terminal alignment reduce acoustic noise in miniaturized multilayer ceramic capacitors.
A multilayer ceramic capacitor with uniform base metal concentration stabilizes capacitance through controlled thermal diffusion.
An extended dielectric layer prevents shorting in narrow trenches, reducing capacitance variability across the wafer.
A multilayer ceramic capacitor optimizes the ratio of thermally stimulated depolarization current peaks to control oxygen defect movement.
A multilayer capacitor adjusts series resistance by connecting inner electrode groups to distinct outer electrodes.
Adding copper to nickel internal electrodes compensates for structural defects caused by thinning, preventing moisture permeation while sustaining capacitance.
A film capacitor uses a syndiotactic styrene polymer dielectric to stabilize fuse operations and enhance heat resistance.
Thinner dielectric layers between additional electrodes reinforce the structure without increasing height or reducing capacity.
Controlling secondary-phase grain boundaries suppresses moisture-induced cracking to maintain insulation resistance.
Screen-printed graphene layers boost sensor reliability and response speed while solving miniaturization challenges.
Precious metal additives in nickel electrodes prevent oxidization, enabling thinner covers and higher capacitance per unit volume.
Hard margin portions prevent insulation breakdown, allowing accurate breakdown voltage prediction without time-consuming electric field testing.
Busbars with ridge-receiving portions stabilize connections against winding-induced ridges, reducing inductance and improving heat dissipation.
Optimized bonding area ratios between metal frames and external electrodes prevent delamination under thermal stress.
An additive layer mediates nickel diffusion into the dielectric, maintaining uniform concentration within ±20% to prevent capacitance anomalies.
Segregating dopants at grain boundaries suppresses tetragonality and ferroelectricity, lowering dielectric loss below 1% up to 100 MHz.
Incorporating aluminum into copper powder prevents oxidation without degrading electrical conductivity.
Porous bumps with 5 to 40 percent voids absorb excess solder during mounting, preventing squeal noise and maintaining mechanical strength.
A multilayer ceramic capacitor uses a conductive sheet pressed onto internal electrodes to form a uniform resistive layer.
An asymmetric side gap in a multilayer ceramic capacitor accommodates cutting blade deviation, reducing interlayer peeling while maintaining capacitance.
Oxide films on terminal electrode side faces block solder wetting, reducing mounting area while maintaining capacity.
Reoxidation heat treatment fills pores with glass in multilayer ceramic capacitors to eliminate oxygen vacancies from reducing atmosphere sintering.
A dielectric ceramic composition containing Ba, Si, Al, and secondary oxides stabilizes capacitance across wide temperature ranges.
Pattern plating replaces laser drilling to fabricate precise vias, reducing tapering and roughness for high-density interconnects.
Dummy electrodes in the laminated component prevent short-circuit defects and increase equivalent series resistance by segmenting polarity paths.
Reducing internal electrode widths in L-margin regions enables dielectric bending, preventing delamination and improving mechanical strength.