Multilayer Capacitor ESL Reduction via Pin Hole Conducting Portions
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Solution Overview
Problem
Conventional multilayer ceramic capacitors have high equivalent serial inductance (ESL), which exacerbates fluctuations in power source voltage due to increasing load current fluctuations and higher operating frequencies, necessitating a reduction in ESL to stabilize power source voltage.
Innovation Solution
A multilayer capacitor design featuring a dielectric body with alternating internal and external conductor layers and pin hole conducting portions that connect external conductor layers, allowing separate current flow from terminal electrodes to external conductor layers, reducing ESL by creating parallel inductor components and increasing current separation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional multilayer ceramic capacitor structure is used, then manufacturing is simple, but ESL is high causing power source voltage fluctuation
Solution Approach 1:
The capacitor is divided into multiple functional layers including internal electrode layers, external electrode layers, and dummy electrode layers. Each layer serves a specific function in current distribution and ESL reduction, transforming the conventional simple structure into a segmented multi-functional structure that reduces ESL while maintaining manufacturability
Solution Approach 2:
The invention introduces external electrode layers and dummy electrode layers that extend the conventional planar electrode structure into a three-dimensional stacked configuration. This dimensional expansion allows current to flow through multiple parallel paths, reducing ESL without significantly complicating the manufacturing process
2Reliability
If ESL is reduced to stabilize power source voltage, then power source voltage stability improves, but current flow path becomes complex
Solution Approach 1:
Dummy electrode layers are introduced as intermediary elements between the internal electrode layers and external terminals. These dummy layers facilitate current distribution and provide additional parallel current paths, reducing ESL while maintaining straightforward current flow characteristics through the capacitor structure
Solution Approach 2:
The invention merges multiple electrode functions into a unified stacked structure where internal electrodes, external electrodes, and dummy electrodes work together. This consolidation creates multiple parallel current paths that reduce ESL while maintaining ease of operation through the integrated design
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design significantly reduces ESL, effectively stabilizing power source voltage and making the capacitor suitable for use as a decoupling capacitor, even at higher frequencies.
Implementation Method 1
a plurality of pin hole conducting portions connecting a pair of first external conductor layers or a pair of second external conductor layers each other adjacent to the dielectric layer, in stacking direction
Data Source
AI summary
A multilayer capacitor is provided that includes a dielectric body, an internal layer portion, an external layer portion and a first terminal electrode and a second terminal electrode to be set at different electric potentials from each other and formed at least on a side face parallel to stacking direction Z of side faces of the dielectric body. Each of the first terminal electrodes are connected with at least one of the first internal conductor layer and a plurality of the first external conductor layers and each of the second terminal electrodes are connected with at least one of the second internal conductor layer and a plurality of the second external conductor layers. The dielectric layer positioned at the external layer portions comprises a plurality of pin hole conducting portions.