Cerium Oxide Etch Stop Material for 3D NAND Stack Integrity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional etch stop materials in semiconductor device fabrication are inadequate in preventing the etching through of stack structures in three-dimensional NAND devices, leading to undesired removal of underlying materials and increased risk of toppling of stack structures, and existing solutions such as increasing thickness or using alternative materials like tungsten result in costly processes or residue issues.
Innovation Solution
The use of an etch stop material comprising an oxide of cerium and at least one of magnesium, aluminum, or hafnium, which is formulated to exhibit selective etch properties, allowing it to remain intact during dry etch processes while being selectively removable with a wet etchant, thus maintaining the integrity of stack structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional etch stop materials are used, then the fabrication process is simple, but the etch stop material cannot prevent etching through of stack structures leading to undesired removal of underlying materials
Solution Approach 1:
The patent employs a composite etch stop material comprising cerium oxide combined with at least one of magnesium oxide, aluminum oxide, or hafnium oxide. This composite formulation provides superior etch resistance compared to conventional single-material etch stops, effectively preventing etching through of stack structures while maintaining fabrication simplicity through blanket deposition processes.
Solution Approach 2:
The patent optimizes the thickness parameter of the etch stop material to a specific range (5 nm to 50 nm) to achieve effective etch stopping without causing undercutting issues. This parameter optimization resolves the contradiction by providing sufficient etch resistance while maintaining clean etch profiles and preventing undesired removal of underlying materials.
2Reliability
If the thickness of etch stop material is increased to overcome conventional material limitations, then etch resistance improves, but undercutting of etch stop material occurs increasing likelihood of toppling
Solution Approach 1:
The composite etch stop material comprising cerium oxide and at least one of magnesium oxide, aluminum oxide, or hafnium oxide provides enhanced etch resistance at reduced thicknesses (5-50 nm). This prevents both etching through of stack structures and undercutting-induced toppling, as the composite formulation achieves superior etch stopping power without the thickness-related stability issues of conventional materials.
Solution Approach 2:
The patent specifies an optimized thickness range of 5 nm to 50 nm for the etch stop material. This parameter control ensures sufficient etch resistance to prevent stack structure etching through while maintaining adequate structural stability to prevent undercutting and toppling, effectively resolving the contradiction between etch effectiveness and profile integrity.
3Reliability
If alternative materials like tungsten are used as etch stop material, then etch resistance improves, but residue is redeposited on NAND strings
Solution Approach 1:
The patent employs a composite etch stop material comprising cerium oxide and at least one of magnesium oxide, aluminum oxide, or hafnium oxide that provides excellent etch resistance without the redeposition issues of tungsten. The oxide-based composite formulation eliminates harmful residue generation on NAND strings while maintaining effective etch stopping capability.
Solution Approach 2:
The etch stop material is designed to be selectively removable using specific wet etchants after serving its protective function. This disposable approach allows the etch stop material to effectively prevent etching through during fabrication, then be cleanly removed without leaving residue, unlike permanent materials such as tungsten that cause redeposition issues.
4Reliability
If etch stop plugs are formed using discrete patterning, then etch resistance improves, but process cost increases due to separate patterning acts
Solution Approach 1:
The etch stop material layer serves multiple functions: it provides etch resistance to prevent stack structure etching through, defines etch boundaries for clean profile formation, and acts as a sacrificial layer for subsequent removal. This multi-functional blanket-deposited layer eliminates the need for separate discrete plug patterning processes, reducing fabrication complexity and cost while maintaining effective etch stopping.
Solution Approach 2:
The patent combines the etch stop function with the existing blanket-deposited oxide layer structure, merging multiple functions into a single continuous layer. This approach integrates etch protection, profile definition, and sacrificial removal capabilities into one process step, eliminating the need for separate discrete plug formation processes and associated patterning costs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables the formation of semiconductor devices with pillar structures having substantially vertical sidewalls and high aspect ratios, facilitating the formation of complex patterns without undesirably removing underlying materials, and allows for the fabrication of multiple tiers of memory arrays with improved memory density and reduced costs.
Implementation Method 1
An etch stop material may be formed over the semiconductor material. The etch stop material may include an oxide of cerium and at least another oxide. For example, the etch stop material may include cerium oxide and magnesium oxide
Data Source
AI summary
A semiconductor device comprises a semiconductor material extending through a stack of alternating levels of a conductive material and an insulative material, and a material comprising cerium oxide and at least another oxide adjacent to the semiconductor material. Related electronic systems and methods are also disclosed.