Self-Selecting Chalcogenide Memory Layer for Sneak Current Control
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Solution Overview
Problem
Existing memory devices face challenges in miniaturization and sneak current prevention due to the need for separate selectors and memories, while self-selecting memory (SSM) devices are not adequately addressing reliability and stability issues.
Innovation Solution
A memory device utilizing a self-selecting memory material with a composition of Ge, As, Se, and O, where In content is between 0-7%, and optionally S, Sb, Al, or Ga, which enhances thermal stability and reduces Vth_drift, improving both selector and memory functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate selectors and memory devices are used in memory devices, then sneak current prevention is improved, but device complexity increases
Solution Approach 1:
The patent combines the selector and memory device into a single integrated device, where the chalcogenide-based memory layer exhibits both selection functionality (through resistive switching) and memory storage capabilities. This merging eliminates the need for separate selector components while maintaining sneak current prevention through the inherent non-linear I-V characteristics of the chalcogenide material.
Solution Approach 2:
The chalcogenide-based memory layer serves multiple functions simultaneously: it acts as both the selector element (providing on/off switching) and the memory element (storing data through resistance states). This multi-functionality reduces device complexity by eliminating dedicated selector structures while maintaining reliable operation.
2Area of stationary object
If self-selecting memory devices are used to miniaturize memory devices, then area reduction is improved, but reliability and stability deteriorate
Solution Approach 1:
The patent employs a composite chalcogenide material system comprising Ge, As, Se, and In elements with specifically controlled compositions. This composite material provides both the miniaturization benefits of SSM devices and enhanced reliability through optimized material properties including appropriate threshold voltages, stability against degradation, and controlled crystallization behavior.
Solution Approach 2:
The patent optimizes multiple material parameters including the composition ratios of Ge, As, Se, and In elements, the thickness of the memory layer, and thermal processing parameters during fabrication. These parameter optimizations ensure that the miniaturized device maintains stable and reliable operation by controlling threshold voltage drift and preventing unwanted crystallization.
3Ease of operation
If In content in memory layer is increased to improve selector function, then switching performance is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent defines a specific range for In content (0-7 atomic %) rather than requiring a single precise value. This parameter specification provides sufficient switching performance while accommodating normal manufacturing variations, thereby reducing the stringency of composition control requirements during fabrication.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The Ge-As-Se-O based memory layer achieves both selector and memory functions with improved reliability and stability, reducing sneak current and enhancing memory window characteristics.
Implementation Method 1
the memory layer may have a characteristic in which a threshold voltage changes depending on a polarity and an intensity of an applied voltage
Implementation Method 2
A content of In in the memory layer may be greater than 0 at % and less than or equal to 7 at %
Implementation Method 3
a content of O in the memory layer may be greater than 1 at % and less than or equal to 10 at %
Data Source
AI summary
Provided are a memory device including oxygen and chalcogenide, an electronic device including the memory device, and a method of manufacturing the memory device. The memory device may include a plurality of bit lines extending in a first direction, a plurality of word lines extending in a second direction, wherein the second direction may cross the first direction, and a memory layer at points where the plurality of bit lines and the plurality of word lines cross each other. The memory layer may have a characteristic in which a threshold voltage changes depending on a polarity and an intensity of an applied voltage. The memory layer may include Ge, As, Se, In, and O.