Semiconductor Channel-Via Layout for Dense Routing Across Fluid Channels
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Solution Overview
Problem
Existing semiconductor devices face limitations in the number, density, and scalability of vias due to the presence of channels, cavities, or voids, which restrict the routing of electrical signals and the integration of fluid-filled heatsinks.
Innovation Solution
The semiconductor device incorporates a first substrate with vias extending to a ridge of a channel and lines extending along the ridge to connect with other connectors on a second substrate, allowing for increased via density and electrical pathways without overlapping ridges, while preventing fluid interference using zero-clearance bonding surfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If channels, cavities, or voids are formed in the semiconductor device, then fluid management and heat dissipation are improved, but the number and density of vias are limited
Solution Approach 1:
The invention segments the via structure into two parts: (1) vias extending only to the ridge of the channel rather than through the entire substrate, and (2) conductive lines extending along the ridge surface to connect to other substrates. This segmentation allows increased via density while preventing fluid interference with the conductive elements.
Solution Approach 2:
The ridge structure acts as an intermediary element that separates the fluid-filled channel from the conductive vias and lines. By positioning vias to terminate at the ridge and using the ridge as a connection point for conductive lines, the invention prevents direct fluid contact with conductive elements while maintaining electrical connectivity.
2Quantity of substance
If vias are extended through the substrate to increase connectivity, then electrical pathways are improved, but fluid interference with conductive elements occurs
Solution Approach 1:
The via structure is segmented to extend only to the channel ridge rather than through the entire substrate. This partial extension maintains electrical connectivity needs while creating a physical barrier (the ridge) that prevents fluid from contacting the conductive via elements.
Solution Approach 2:
The invention transitions from purely vertical via structures to a combination of vertical vias terminating at the ridge and horizontal conductive lines extending along the ridge surface. This dimensional change allows electrical pathways to route around fluid-filled channels without direct penetration into fluid zones.
Data Source
AI summary
Novel tools and techniques are provided for implementing a semiconductor package or a chip package, and more particularly methods, systems, and apparatuses are provided for implementing a semiconductor package or a chip package including a one or more channel vias. In various embodiments, an apparatus includes a first layer comprising a channel and a first via extending through the first layer to a first surface of a first ridge of the first channel. The apparatus can further include a second layer coupled to the first layer. The second layer can be a first outer layer of the first substrate. The apparatus can also include a first line coupled to the first via and extending along the first ridge of the first channel and embedded in the second layer.