Matched Charge Exchange ADC Circuit for Linearity and Monotonicity
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Solution Overview
Problem
Conventional analog-to-digital circuits using successive approximation with binary weighted networks of resistors or capacitors face limitations in linearity and monotonicity due to component matching issues.
Innovation Solution
A charge exchange technique is employed using matched capacitors to achieve binary weighted references by merging two capacitors, one with charge and the other empty, allowing precise charge division by two, thereby enhancing the conversion process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If binary weighted networks of resistors or capacitors are used in conventional ADC circuits, then the conversion function is achieved, but the linearity and monotonicity are limited due to component matching issues
Solution Approach 1:
The patent changes the fundamental parameter representation from fixed binary-weighted component values to dynamically adjustable charge distributions. By using capacitors that can be charged or discharged in controlled sequences, the system achieves precise voltage division ratios without relying on tightly matched passive components, thereby improving linearity and monotonicity while relaxing manufacturing tolerances
Solution Approach 2:
The patent replaces the traditional passive resistor-capacitor network (electrical passive system) with an active charge pumping mechanism using operational amplifiers and controlled switches. This substitution transforms the system from relying on component value precision to relying on controlled charge transfer and accumulation, eliminating the need for precise binary-weighted component matching
2Measurement precision
If matched capacitors are used to achieve binary weighted references through charge exchange, then linearity and monotonicity are improved, but the device complexity increases
Solution Approach 1:
The patent segments the binary-weighted reference generation into multiple identical capacitor units that are charged or discharged independently in sequence. Each capacitor is identical in value, simplifying manufacturing, while the segmented charge transfer process through multiple switches and op-amps achieves the required binary-weighted voltage references through controlled charge accumulation and division
Solution Approach 2:
The patent creates a universal capacitor module that serves multiple functions: it acts as a reference element, a charge storage element, and a transfer element. The same identical capacitors are reused throughout the circuit for different binary-weighted references by controlling which ones are charged or discharged, eliminating the need for multiple different capacitor values and reducing overall device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the linearity and monotonicity of the data converter, enabling precise conversion between analog and digital representations, and can theoretically support infinite bit count, though practical limitations arise from noise and resolution factors.
Implementation Method 1
First, second and third capacitors are incorporated into the circuit, the first and second capacitors being matched
Implementation Method 2
the inverting input of the operational amplifier is maintained at a virtual ground potential
Implementation Method 3
If the voltage at the non-inverting input exceeds the voltage at the inverting input, then the comparator output is high
Data Source
AI summary
The present invention relates to a circuit for converting between an analog input voltage and a corresponding digital representation of the analog input voltage. First, second and third capacitors are used, the first and second capacitors being matched, the third capacitor serving as an accumulator. A first switch is coupled to one end of the first capacitor, and a second switch is coupled between the one end of the first capacitor and one end of the second capacitor. A third switch coupled between the one end of the second capacitor and one end of the third capacitor, with a discharge circuit being coupled between the one end of the third capacitor and an opposite end of the second capacitor. When the third switch is closed the discharge circuit fully discharges the second capacitor onto the third capacitor. The third switch is closed when the analog input voltage is greater than a reference voltage, and wherein the first switch is closed to discharge the first capacitor followed by opening the first switch and closing the second switch to cause charge on the second capacitor to divide equally between the first and second capacitors when the analog input voltage is not greater than the reference voltage.