Charge Pump Circuit for Non-Volatile Memory Voltage Generation
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Solution Overview
Problem
Existing charge pump circuits for non-volatile memory devices, such as flash memories, require large circuit space for level shift circuits and power switches to generate different voltages for erasing, programming, and reading operations, which hinders size reduction.
Innovation Solution
A charge pump circuit design that includes a power switch, pull-low circuits, and multiple charge pump stages with transistors and capacitors, utilizing phase signals and enabling signals to generate voltages without additional power switches and level shift circuits, thereby reducing circuit size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If level shift circuits and power switches are used to generate different voltages for erasing, program and read operations, then voltage generation capability is improved, but circuit space increases
Solution Approach 1:
The charge pump circuit is designed to perform multiple voltage generation functions (erasing, program, and read operations) using a single integrated circuit structure. The circuit uses the same charge pump stages and switching network to generate different voltages by controlling the switching timing and configuration, eliminating the need for separate level shift circuits and power switches for each operation type.
Solution Approach 2:
The invention combines the functions of level shift circuits and power switches into a single charge pump circuit architecture. By merging these previously separate components into one unified circuit, the patent achieves voltage generation for all operations without requiring additional discrete circuits, thereby reducing overall circuit space.
2Adaptability or versatility
If additional power switches and level shift circuits are added to cover wide voltage range, then voltage range coverage is improved, but device complexity increases
Solution Approach 1:
The charge pump circuit employs dynamic switching control where the switching network reconfigures itself based on the required operation type. By dynamically adjusting the switching timing and configuration of existing transistors and capacitors, the circuit adapts to generate different voltages without requiring additional static components for each voltage level.
Solution Approach 2:
The invention changes operational parameters (switching timing, phase signals, and control signals) rather than changing the physical circuit structure to achieve different voltage outputs. By modifying timing parameters and control signal sequences, the same circuit hardware generates different voltages for erasing, program, and read operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively generates required voltages for operations without additional power switches and level shift circuits, reducing circuit size and saving manufacturing costs while maintaining voltage generation capabilities.
Implementation Method 1
The first charge pump stage includes a first boost capacitor, a first transfer transistor, a first gate-control transistor and a first storage capacitor
Implementation Method 2
a charge pump circuit generates a first voltage in an erasing operation, a second voltage in a program operation or a third voltage in a read operation
Data Source
AI summary
A charge pump circuit includes a power switch, a first pull-low circuit, an output pull-low circuit, a first charge pump stage and an output charge pump stage. The power switch receives an enabling signal. The first pull-low circuit and the output pull-low circuit receive a pull-low signal. The first charge pump stage includes a first boost capacitor used to receive a first phase signal, a first transfer transistor, a first gate-control transistor and a first storage capacitor used to receive a second phase signal. The output charge pump stage includes an output boost capacitor used to receive a third phase signal, an output transfer transistor and an output gate-control transistor. The charge pump circuit generates voltages in an erasing operation, a program operation and a read operation according to the enabling signal, the pull-low signal, the first phase signal, the second phase signal and the third phase signal.


