Charge Pump Clock Frequency Control for Power Efficiency
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Solution Overview
Problem
Conventional charge pumps with built-in capacitors face inefficiencies due to high clock frequencies, leading to excessive power consumption and instability in output voltage, especially with varying loads, as they cannot adapt to optimal operating frequencies and are limited to capacitive loads.
Innovation Solution
A power output circuit comprising a charge pump, voltage regulator, and clock generator, where a voltage detector adjusts the clock signal frequency based on the control voltage magnitude, allowing for optimal operation across varying loads and preventing excessive power consumption by parasitic capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the clock signal frequency is increased to maintain driving capability with built-in capacitors, then the output voltage stability is improved, but the power consumption by parasitic capacitors increases excessively
Solution Approach 1:
The patent implements dynamic frequency adjustment of the clock signal based on load conditions. The system switches between a first frequency and a second frequency according to whether the load is heavy or light, making the operating frequency adaptive rather than fixed. This resolves the contradiction by using high frequency only when necessary for voltage stability while reducing frequency to save power during light load conditions.
Solution Approach 2:
The patent changes the operating parameter (clock frequency) of the charge pump based on load conditions. By adjusting the frequency parameter dynamically - using first frequency for heavy loads and second frequency for light loads - the system optimizes both voltage stability and power consumption, preventing excessive power waste while maintaining adequate driving capability.
2Loss of energy
If the clock signal frequency is decreased to reduce power consumption, then the power efficiency is improved, but the driving capability to react to load variations deteriorates
Solution Approach 1:
The system dynamically adjusts clock frequency based on actual load conditions. During heavy load variations, the higher first frequency provides fast response capability. During light load conditions, the lower second frequency achieves good power efficiency. This dynamic adaptation resolves the contradiction between response speed and power efficiency.
Solution Approach 2:
The operating frequency parameter is changed according to load magnitude. The system uses high frequency (first frequency) when fast response is needed and low frequency (second frequency) when power efficiency is prioritized, optimizing the trade-off between these two parameters based on real-time conditions.
3Device complexity
If fixed frequency switching is used to control the charge pump, then the control simplicity is maintained, but the adaptability to different loading situations deteriorates
Solution Approach 1:
The patent implements dynamic frequency selection between two fixed frequencies based on load detection. The system monitors load conditions and automatically switches between first and second frequencies, providing adaptability to different loading situations while maintaining relatively simple control logic through fixed frequency options rather than continuous frequency adjustment.
Data Source
AI summary
A power output circuit includes a charge pump, a voltage regulator, a clock generator and a voltage detector. The charge pump is used for receiving a clock signal having an operating frequency and outputting an output voltage. The voltage regulator, coupled to the charge pump, is used for outputting a control voltage to the charge pump, to control the output voltage. The clock generator, coupled to the charge pump, is used for outputting the clock signal to the charge pump. The voltage detector, coupled to the clock generator and the voltage regulator, is used for detecting the control voltage and controlling the clock generator to adjust the operating frequency of the clock signal according to a magnitude of the control voltage.