Charge Pump Drive Circuit Impedance Control
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Solution Overview
Problem
Existing charge pump drive circuits face issues with high current consumption and noise due to through-current, which are not effectively addressed by previous solutions.
Innovation Solution
A drive circuit that generates a drive clock signal using a first and second clock signal, where the output node is controlled to be in a high impedance state before the voltage level change, reducing through-current and thus current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a complementary inverter circuit is used as the output circuit, then the drive clock signal can be generated, but through-current flows causing increased current consumption and noise
Solution Approach 1:
The invention applies preliminary action by controlling the output node to enter a high impedance state before the voltage level of the drive clock signal changes. This preemptive control prevents through-current from flowing in the first place, rather than attempting to mitigate it after it occurs. The output node is prepared in advance to be in a high impedance state during the period before the voltage level change, thereby eliminating the harmful through-current effect.
2Loss of energy
If the output node is controlled to high impedance state before voltage level change, then current consumption is reduced, but circuit control complexity increases
Solution Approach 1:
The invention employs periodic action by utilizing periodic clock signals (first and second clock signals) to control the output node's impedance state. The output node is controlled to be in a high impedance state during specific periods (before the voltage level of the drive clock signal changes) and in a low impedance state during other periods (when the voltage level changes). This periodic control approach reduces current consumption while maintaining manageable circuit complexity through rhythmic, predictable control patterns.
Data Source
AI summary
A drive circuit includes an output circuit having an output node that outputs, to a charge pump circuit, a drive clock signal for driving the charge pump circuit. The output circuit generates the drive clock signal based on a first clock signal and a second clock signal that is a signal whose voltage level does not change in a period during which the voltage level of the first clock signal changes, and controls, based on the second clock signal, an impedance of the output node so as to be up, in a period before the voltage levels of the drive clock signal changes.