Charge Pump Circuit With Dual-Swing Clocks for Low-Voltage Boosting
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Solution Overview
Problem
Designing a charge pump that operates efficiently in low voltage environments is challenging due to the need for efficient charge transferring and ensuring transistors operate within their safe operating areas, particularly in flash memory applications requiring high voltages for program and erase operations.
Innovation Solution
A charge pump circuit utilizing two-phase clock signals with different swing amplitudes to control transistors, allowing full voltage drop contribution from each stage, and employing auxiliary control units and voltage gap units to maintain transistor safety and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a traditional Dickson charge pump is used to generate high voltage, then the charge pump can operate in low voltage environment, but the charge transfer efficiency is low due to voltage drop across diodes
Solution Approach 1:
The patent extracts and removes the diode components from the charge pump circuit, replacing them with transistor-based switching mechanisms. This eliminates the voltage drop issue inherent in diode-based charge pumps, thereby improving charge transfer efficiency without requiring additional stages to compensate for energy loss.
Solution Approach 2:
The patent changes the operating parameters by using transistors with controllable resistance characteristics instead of fixed threshold voltage diodes. By controlling the gate voltage of the transistors, the circuit can achieve near-zero voltage drop during charge transfer, significantly improving efficiency compared to the VDD-Vt limitation of diode-based designs.
2Power
If more stages are added to achieve targeted negative voltage, then the output voltage requirement is met, but the device complexity and area increase
Solution Approach 1:
The patent merges the functions of multiple traditional charge pump stages into a single optimized stage by using complementary transistor pairs (PMOS and NMOS) working together. This combined approach allows the circuit to achieve the same voltage multiplication effect that would traditionally require multiple diode-based stages, thereby reducing overall device complexity and area.
Solution Approach 2:
The patent introduces dynamic control mechanisms where transistor gate voltages are actively switched based on clock signals. This dynamic operation allows the circuit to adapt its behavior to achieve the required output voltage with fewer stages, as the transistors can be fully turned on during charge transfer phases, maximizing efficiency and voltage gain per stage.
3Use of energy by moving object
If transistors are operated at low voltage to reduce power consumption, then power efficiency improves, but transistor reliability decreases due to operating near threshold
Solution Approach 1:
The patent employs periodic clock signals to alternately switch transistors on and off in a controlled manner. During the on-phase, transistors operate at optimal voltage levels for reliable charge transfer, while during the off-phase, they are completely turned off. This periodic switching allows the circuit to maintain low average power consumption while ensuring transistors operate within safe margins during active phases.
Solution Approach 2:
The patent implements control circuits that monitor transistor operating conditions and adjust gate voltages accordingly. This feedback mechanism ensures that transistors maintain adequate voltage margins during operation, preventing operation too close to the threshold where reliability would be compromised, while still achieving low overall power consumption through efficient switching control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution enables efficient charge transfer and voltage boosting in low voltage environments, suitable for low power applications, with improved efficiency and reduced transistor stress, enabling the use of low-voltage transistors with thin oxides.
Implementation Method 1
The first capacitor has a first terminal configured to receive a first clock signal, and a second terminal. The second capacitor has a first terminal configured to receive a second clock signal, and a second terminal.
Implementation Method 2
The first transistor has a first terminal coupled to the input terminal, a second terminal coupled to the second terminal of the first capacitor, and a control terminal coupled to the second terminal of the second capacitor. The second transistor has a first terminal coupled to the second terminal of the second capacitor, a second terminal coupled to the second terminal of the first transistor, and a control terminal.
Data Source
AI summary
A charge pump circuit includes a pump unit and an output transistor for outputting a pumped voltage generated by the pump unit. The pump unit includes a first capacitor, a second capacitor, a first transistor, a second transistor, and an auxiliary control unit. The first capacitor receives a first clock signal, and the second capacitor receives a second clock signal having a swing greater than that of the first clock signal. The first transistor has a first terminal coupled to an input terminal, a second terminal coupled to the first capacitor, and a control terminal coupled to the second capacitor. The second transistor has a first terminal coupled to the second capacitor, a second terminal coupled to the second terminal of the first transistor, and a control terminal coupled to the auxiliary control unit, which turns on the second transistor when the first clock signal is high.