Charge Pump Circuit Gate Length Optimization
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Solution Overview
Problem
Conventional charge pump circuits in semiconductor devices face inefficiencies due to increased threshold voltage in later-stage MOS transistors, leading to reduced boosting performance and larger circuit area, as well as challenges in maintaining high current driving performance and breakdown voltage.
Innovation Solution
The charge pump circuit design includes MOS transistors with systematically varied distances (a to d) and gate lengths (g) along the series connection, with earlier stages having smaller distances and longer gate lengths to reduce back bias effects, and later stages having larger distances to enhance breakdown voltage and current driving capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the number of stages of rectifying elements is increased to secure sufficiently-boosted voltage, then the boosting performance is improved, but the circuit area is enlarged
Solution Approach 1:
The patent applies local quality by differentiating the gate lengths of MOS transistors based on their position in the charge pump circuit. Earlier-stage MOS transistors have longer gate lengths to reduce back bias effects and maintain lower threshold voltages, while later-stage MOS transistors have shorter gate lengths. This localized optimization allows each stage to be tailored to its specific operational requirements, achieving sufficient voltage boosting without increasing the number of stages or circuit area.
Solution Approach 2:
The patent changes the parameter of gate length systematically across different stages of the charge pump circuit. By varying the gate length parameter according to the stage position, the threshold voltage characteristics are optimized for each stage. This parameter change enables the circuit to achieve the required voltage boosting performance with fewer stages, thereby reducing the overall circuit area.
2Ease of manufacture
If MOS transistors with uniform gate lengths are used in series connection, then the manufacturing process is simplified, but the boosting performance deteriorates in later stages due to increased threshold voltage
Solution Approach 1:
The patent implements local quality by assigning different gate lengths to MOS transistors at different stages of the charge pump circuit. This differentiation addresses the back bias effect that causes threshold voltage increase in later stages. By making the gate length a local property rather than a uniform parameter, the circuit maintains optimal boosting performance across all stages while remaining manufacturable through standard semiconductor fabrication processes.
3Area of stationary object
If the distance between gate and contact plug is reduced to minimize circuit area, then the circuit area is reduced, but the current driving performance and breakdown voltage are compromised
Solution Approach 1:
The patent applies local quality by optimizing the distance between gate and contact plug based on the MOS transistor's position in the charge pump circuit. Earlier-stage MOS transistors, which handle lower voltages, can have smaller distances to minimize area. Later-stage MOS transistors, which operate at higher voltages and require better current driving performance, are designed with larger distances between gate and contact plug. This localized optimization achieves area reduction while maintaining the necessary reliability for high-voltage operation.
Data Source
AI summary
A semiconductor device includes MOS transistors, capacitor elements, a voltage generating circuit, a contact plug, and a memory cell. The MOS transistor and the capacitor element are formed on a first one of the element regions and a second one of the element regions, respectively. In the voltage generating circuit, current paths of the MOS transistors are series-connected and the capacitor elements are connected to the source or drain of the MOS transistors. The contact plug is formed on the source or the drain to connect the MOS transistors or one of the MOS transistors and one of the capacitor elements. A distance between the gate and the contact plug both for a first one of the MOS transistors located in the final stage in the series connection is larger than that for a second one of the MOS transistors located in the initial stage in the series connection.