Charge Pump Power Savings via Dynamic Mode Switching
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Solution Overview
Problem
Conventional charge pumps consume significant dynamic and static power, particularly at lower-frequency clock inputs, which is undesirable for extending battery life and reducing power dissipation.
Innovation Solution
Implementing a charge pump system that compares voltage levels and clock frequencies with thresholds to transition between power-saving and normal modes, disabling voltage generators and switches as necessary to reduce power consumption, and directly connecting clock drivers to supply and output voltages during power-saving modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage buffers are used to increase switch gate-to-source voltages above supply voltage, then switch efficiency is improved, but static power consumption increases
Solution Approach 1:
The charge pump system dynamically transitions between two operational modes: a first mode where voltage buffers are enabled to provide enhanced gate-to-source voltages for high-frequency operation, and a second power-saving mode where voltage buffers are disabled for low-frequency operation. This dynamic switching resolves the contradiction by adapting the voltage buffer operation to the actual clock frequency requirements.
Solution Approach 2:
The system changes the operational parameters of the voltage buffers based on clock frequency detection. When the clock frequency exceeds a threshold, voltage buffers operate normally to ensure switch efficiency. When frequency drops below the threshold, voltage buffers are disabled to reduce static power consumption, thus adapting parameters to operating conditions.
2Productivity
If voltage buffers are continuously enabled to maintain high switch gate-to-source voltages, then charge pump efficiency is improved, but quiescent current dissipation increases
Solution Approach 1:
The voltage buffers are activated periodically based on the operational mode transitions triggered by clock frequency detection. During high-frequency periods, buffers are active to maintain efficiency. During low-frequency periods, buffers are deactivated to reduce quiescent current. This periodic activation pattern resolves the contradiction between maintaining efficiency and reducing standby power loss.
Solution Approach 2:
The system employs dynamic control of voltage buffer operation, switching between enabled and disabled states based on real-time clock frequency monitoring. This dynamic approach allows the charge pump to optimize efficiency during high-frequency operation while minimizing quiescent current during low-frequency operation, resolving the contradiction between productivity and energy consumption.
3Use of energy by stationary object
If voltage generators and buffers are disabled in power-saving mode, then power consumption is reduced, but voltage stress on switches increases
Solution Approach 1:
Clamp switches are introduced as intermediary protection elements that activate when voltage generators and buffers are disabled. These clamp switches prevent excessive voltage stress on the main charge pump switches by providing alternative current paths or voltage clamping, thus enabling power-saving mode operation without compromising switch reliability.
Solution Approach 2:
The clamp switches provide beforehand protection against voltage stress that would occur during power-saving mode. By pre-positioning these protective elements in the circuit, the system can safely disable voltage generators and buffers without risking excessive voltage stress on the switches, thus resolving the contradiction between power reduction and stress prevention.
Data Source
AI summary
Exemplary embodiments are directed to systems, devices, methods, and computer-readable media for reducing static and dynamic power consumption of a charge pump. In one embodiment, a device may include a plurality of switches, each switch of the plurality having a gate coupled to a dedicated driver of a plurality of drivers. The device may further include at least one clamp switch coupled to at least one driver of the plurality of drivers and configured to adjust a rail voltage of the at least one driver if an input voltage is greater than a threshold voltage. In another embodiment, the device may include a plurality of multiplexers, each multiplexer of the plurality of multiplexers coupled to a portion of an associated switch of the plurality of switches and configured to disable the portion of the associated switch if a clock frequency of the charge pump is below a threshold frequency.