Charge Pump Segmentation for 3D Memory Voltage Ripple
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Solution Overview
Problem
As the number of stack layers in three-dimensional memory increases, the negative voltage charge pump struggles to provide a stable read voltage with minimal ripple, leading to increased power consumption and circuit area, which affects the accuracy and stability of the read voltage.
Innovation Solution
The implementation includes a peripheral circuit with multiple charge pumps, each receiving different clock signals with a preset delay, allowing for staggered charge replenishment and reducing voltage ripple during stable stages. This configuration improves current efficiency and reduces power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of stack layers in three-dimensional memory increases, then the storage capacity is improved, but the voltage ripple increases and read voltage stability deteriorates
Solution Approach 1:
The charge pump circuit is divided into multiple independent charge pump units (first charge pump unit, second charge pump unit, etc.), each capable of operating independently. This segmentation allows the total pump current to be distributed across multiple units, reducing the ripple voltage generated by each individual unit while maintaining the total current required for high-capacity memory operation.
Solution Approach 2:
Different clock signals with different frequencies are applied to different charge pump units (e.g., first clock signal for first charge pump unit, second clock signal for second charge pump unit). This periodic action with staggered timing causes the ripple voltages from different units to occur at different times, effectively reducing the peak-to-peak ripple voltage when the units are combined.
2Quantity of substance
If the number of stack layers in three-dimensional memory increases, then the storage capacity is improved, but the power consumption increases
Solution Approach 1:
The charge pump is segmented into multiple units that can be independently controlled. This allows for more efficient current distribution and reduces the overall power consumption by optimizing the operation of each unit based on the actual memory access patterns and voltage requirements.
Solution Approach 2:
Different operating parameters (clock frequencies, pump currents) are applied to different charge pump units based on their specific functions and the memory operation requirements. This parameter optimization reduces unnecessary power consumption while maintaining the required voltage levels for high-capacity memory operation.
3Quantity of substance
If the number of stack layers in three-dimensional memory increases, then the storage capacity is improved, but the circuit area increases
Solution Approach 1:
The charge pump circuit is segmented into multiple modular units that can be arranged in a compact configuration. This modular segmentation allows for better space utilization and reduces the overall circuit area required to support high-capacity three-dimensional memory by distributing the pump circuitry efficiently across the available space.
4Quantity of substance
If the number of stack layers in three-dimensional memory increases, then the storage capacity is improved, but the accuracy of read voltage decreases
Solution Approach 1:
The charge pump is divided into multiple units with independent control, allowing for more precise regulation of the read voltage. Each unit can be independently adjusted to compensate for voltage drops and maintain accurate read voltage levels across all memory cells, even in high-capacity multi-layer configurations.
Solution Approach 2:
The use of different frequency clock signals for different charge pump units creates staggered ripple patterns that average out over time, providing a more stable and accurate read voltage. This periodic action with varying frequencies helps maintain voltage accuracy by preventing synchronized ripple peaks that would otherwise degrade read voltage precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the voltage ripple and improves the stability of the read voltage, while also decreasing power consumption and circuit area, thus addressing the challenges posed by increasing stack layers in three-dimensional memory.
Implementation Method 1
The peripheral circuit may apply a program voltage or a read voltage to the memory array, so as to read or write storage information. The peripheral circuit typically comprises a charge pump that may be configured to boost or buck an input supply voltage or even generate a negative voltage, by controlling charge or discharge of an internal capacitor.
Data Source
AI summary
Examples of the present disclosure provide a memory, a storage system, and an operation method of a memory. The memory includes: a plurality of memory planes and a peripheral circuit coupled to the memory planes. The peripheral circuit includes: a plurality of charge pumps, a charge pump having a clock signal end, an input end, and an output end, wherein the output end of each of the charge pumps is coupled to one of the plurality of memory planes; the charge pump is configured to boost an input voltage of the input end according to a clock signal received by the clock signal end and then output the same to the output end; wherein clock signals received by clock signal ends of the plurality of charge pumps are different.