Charge Pump Circuit Single Boosting Capacitor Low Voltage Operation
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Solution Overview
Problem
Charge pump voltage doublers face inefficiencies due to the need for multiple boosting capacitors, high input voltage requirements, and increased costs associated with triple well CMOS technology, leading to substantial power losses and limited flexibility in integrated circuits.
Innovation Solution
A charge pump circuit utilizing a single boosting capacitor and P-type switches, implemented in standard CMOS technology, which alternates electrical energy transfer through control signals to achieve high power efficiency and operate with low input voltages, reducing component count and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If traditional charge pump voltage doublers use two boosting capacitors per stage, then voltage doubling function is achieved, but device complexity and component count increase
Solution Approach 1:
The patent merges the functions of two separate boosting capacitors into a single shared boosting capacitor. The first and second charge pump circuits both connect to the same boosting capacitor, allowing it to serve dual purposes in generating output voltages. This consolidation reduces the total component count while maintaining the voltage doubling functionality through coordinated switching of the charge pump circuits.
2Adaptability or versatility
If charge pump voltage doublers require input voltages substantially higher than transistor threshold voltage, then circuit operation is ensured, but adaptability to low voltage applications is limited
Solution Approach 1:
The patent employs parameter changes by dynamically adjusting the threshold voltage of transistors through body biasing techniques. By applying reverse bias to the body terminals of the transistors, the threshold voltage is reduced, enabling the circuit to operate reliably with input voltages that would normally be below the standard threshold voltage requirement. This allows the charge pump to function across a wider voltage range including low voltage applications.
3Reliability
If triple well CMOS technology is used for charge pump voltage doublers, then circuit performance is improved, but manufacturing cost increases
Solution Approach 1:
The patent replaces the expensive triple well CMOS technology with standard CMOS technology, accepting a trade-off in process capabilities. The design compensates for the limitations of standard CMOS through clever circuit topology and body biasing techniques, achieving acceptable performance without requiring the costly triple well fabrication process. This makes the charge pump more economically viable for mass production.
4Power
If charge pump voltage doublers are designed for high voltage output, then voltage multiplication is achieved, but power losses increase substantially
Solution Approach 1:
The patent uses periodic switching action to transfer charge in discrete packets rather than continuous flow. The charge pump circuits switch periodically to charge and discharge the shared boosting capacitor, which reduces resistive losses compared to continuous operation. This periodic charge transfer mechanism improves power efficiency while maintaining the ability to generate high output voltages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves high power efficiency and reduced component costs by using a single boosting capacitor and P-type switches, enabling operation with low input voltages and minimizing power losses, while eliminating the need for triple well CMOS technology.
Implementation Method 1
The charge pump circuit further comprises a boosting capacitor which is (directly) coupled at a first side to the output node of the first P-type switch and which is (directly) coupled at a second side to a capacitor control signal. The boosting capacitor may be responsible for transferring electrical energy from the input to the output of the charge pump circuit.
Implementation Method 2
The charge pump circuit comprises a first P-type switch comprising an input node and an output node. The input node of the first P-type switch is coupled to the input of the charge pump circuit. The charge pump circuit further comprises a second P-type switch comprising an input node and an output node.
Data Source
AI summary
The present document relates to charge pump voltage doublers for use in integrated circuits. A charge pump circuit configured to generate an output voltage Vout at an output of the circuit from an input voltage Vin at an input of the circuit is described. The circuit further comprises a boosting capacitor coupled at a first side to the output node of the first P-type switch and coupled at a second side to a capacitor control signal. Furthermore, the circuit comprises control circuitry configured to provide a capacitor control-signal-which alternates between a low level and a high level, and configured to generate first and second control signals based on the capacitor control signal for alternating the first and second P-type switches between on-states and off-states, respectively, such that electrical energy is transferred from the input to the output of the circuit using the boosting capacitor.