Apparatus Without Intermediate Ac Conversion TRIZ Cases

A power control device uses a transformation circuit to filter current sample voltages and generate short detection signals.

A charge pump circuit uses a single boosting capacitor and P-type switches to transfer electrical energy efficiently.

Segmented two-phase operation limits voltage swing, enabling high efficiency and compact integration with low breakdown voltage devices.

A charge pump circuit dynamically adjusts output voltages to reduce power consumption.

Synchronizing clock and touch driving signals eliminates aperiodic power noise, ensuring accurate touch detection in large panels.

A negative voltage generation circuit uses a charge pump and control loop to stabilize output.

Dynamic current adjustment reduces power consumption while maintaining reliable voltage fixing across the load terminals.

A voltage boost circuit uses a precharged boost capacitor to supply a boosted output voltage to thin oxide field effect transistors.

A display driving apparatus compares power source voltage with enable signals to detect converter states.

A mixed power converter uses a buck circuit oscillator to clock its switched-capacitor stage.

RC and linear decay circuits emulate inductor current to generate a continuous IMON signal across operational modes.

Multi-sensor fusion detects faults in bidirectional solid state power converters, isolating locations to prevent component damage.

Integrated pin design with angled connection surfaces reduces substrate area occupation while improving heat dissipation and structural reliability.

Charge pump adjusts output voltage through dynamic transistor and capacitor switching configurations.

A capacitive coupling element connects two galvanically isolated vehicle electrical systems to transmit wake-up signals.

Injecting scaled current into a resistive node creates a pseudo resistance multiplier, reducing area occupancy without increasing physical resistor size.

Controller triggers simultaneous SCVR phase activation when di/dt exceeds a threshold, preventing system lockouts during high load demands.

A current mode DC-DC converter adjusts sensing resistance to control pulse width modulation signal delay.

Predicting load transients allows a power regulator to adjust output voltage before drops occur, maintaining stability below minimum operating levels.

A switching-capacitor regulator uses a charge injection mode to maintain stable output voltage under high loading current conditions.

Capacitive divider replaces resistive feedback in charge pump circuits, eliminating DC current consumption and minimizing output voltage ripples.

A multi-level converter architecture uses a charge pump to generate PWM signals with reduced switching amplitude.

A switched-capacitor converter sets a minimum ON timer from the free-running OFF pulse width, resolving light load instability and jittery operation.

A low-dropout regulator uses closed-loop and open-loop circuits to maintain node voltage.

Auxiliary section controls transistors to reduce voltage drops and input current consumption.

A level-shift capacitor stores charge to supply operational current for amplifier bias circuits.

A voltage conversion circuit uses a switcher to select between single or dual step-up units for efficient DC voltage adjustment.

A clock signal boost circuit uses depletion type NMOS transistors to charge a capacitor and double the peak value of the output signal.

A dual mode charge pump circuit generates reduced bipolar supply voltages using a single flying capacitor and two reservoir capacitors.

Capacitive energy transfer replaces resistive regulation to eliminate heat loss, achieving 75% power efficiency in voltage conversion.

Segmented switching stages reduce output voltage ripple and capacitance requirements in high-gain converters.

A trimmable current source discharges capacitive charge from disabled stages to prevent voltage stress on low-voltage components.

A voltage generation circuit uses a periodic wave generator to enable and disable internal voltage generators based on operational needs.

Segmented parallel circuits with synchronous rectification reduce diode losses and support large load currents.

Sequential signal delivery maintains interlaced operation and reduces ripple current without forced shutdowns.

A single-stage CMOS voltage quadrupler circuit uses bootstrapped capacitors and level-shifted clock signals to boost input voltage efficiently.

Frequency-domain fitting methods synthesize stable charge pump models, resolving instability and complexity issues in conventional time-domain approaches.

An on-demand charge pump monitoring control loop activates only when voltage correction is needed.

A digital processor determines a slope compensated peak current reference using sampled voltages and currents.

A controller dynamically adjusts the output voltage set point of a DC to DC converter using an intermediary capacitor to manage energy flow.

A voltage regulator controller holds current VID values during large transitions to suppress audible noise from piezoelectric capacitors.

A reconfigurable charge pump uses an arrangement control mechanism to dynamically adjust internal stage connections for optimized output voltage.

An apparatus calculates RMS current by integrating squared samples to detect heating effects and deactivate a switch before wiring damage occurs.

Dual-domain charge pump circuits switch between voltage levels to maintain operation when standard supply conditions are unavailable.

A controller adjusts power converter operation to reduce noise during feedback sampling windows.