Voltage Doubler Charge Pump with Auxiliary Section
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Solution Overview
Problem
Conventional charge pumps face inefficiencies and increased layout area due to voltage drops across transistors, which are exacerbated by higher voltages and current demands, making it challenging to generate higher output voltages with minimal input current and area requirements.
Innovation Solution
The introduction of a threshold voltage cancellation section with the same structure as the main output section, where the control gates of transistors are connected to mirrored nodes to prevent backflow and reduce voltage drops, combined with a voltage doubler design that doubles the input voltage efficiently, reducing the number of stages needed and improving power and area efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional charge pump designs are used to generate higher output voltages, then the output voltage level increases, but voltage drops across transistors increase and input current consumption increases
Solution Approach 1:
The charge pump is divided into multiple stages, each contributing to the overall voltage multiplication. By segmenting the voltage boosting process into discrete stages with controlled transistor switching, the design achieves higher output voltages while managing voltage drops through optimized stage configuration and transistor sizing.
Solution Approach 2:
The patent optimizes transistor dimensions (width and length parameters) to minimize voltage drops across switching devices. By carefully selecting and adjusting these geometric parameters, the design reduces resistive losses and improves power efficiency while maintaining the ability to generate elevated output voltages.
2Power
If more stages are added to achieve higher output voltages, then the voltage multiplication capability improves, but layout area increases
Solution Approach 1:
The patent combines multiple pump stages into a compact integrated structure where capacitors and transistors are shared or closely coupled between stages. This merging approach allows the charge pump to achieve high voltage multiplication ratios without proportionally increasing the layout area, as components serve multiple functional purposes across different stages.
Solution Approach 2:
The design utilizes vertical stacking and three-dimensional layout techniques to accommodate multiple pump stages within a reduced planar footprint. By transitioning from a purely two-dimensional expansion to incorporating vertical dimensionality in the circuit architecture, the patent achieves high voltage multiplication capability while constraining the horizontal layout area.
Data Source
AI summary
A charge pump circuit using a voltage doubler-type of circuitry for generating an output voltage is described. An output generating stage uses a voltage double structure, except that the transistors in each leg are not cross-coupled to the other leg, but instead are controlled by an auxiliary section. The auxiliary section has a voltage doubler structure, but is not used to drive the load, but instead provides the gate voltage for the precharge section using the same levels as used for the corresponding transistors in the auxiliary section. This arrangement can be particularly advantageous for applications using low supply voltages to address self-loading effect due to loading. As the auxiliary section does not drive the load, its elements can be sized smaller. Additional improvement can be obtained by using separate clock drivers for the auxiliary section to address secondary self-loading effect due to loading.