Digital Slope Compensation for Peak Current Control in SMPS
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Solution Overview
Problem
Existing peak current control methods for switched mode power supplies (SMPS) require separate hardware modules, external analog components, or high computational throughput, making them inefficient and costly, especially at high switching frequencies.
Innovation Solution
A method for digital slope compensation in SMPS controllers that uses a digital processor to determine a digital slope compensated peak current reference by sampling input and output voltages and inductor currents, converting them to digital representations, and applying a digital-to-analog converter to generate an analog slope compensated peak current reference for comparison with the inductor current, eliminating the need for external hardware and high computational resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external analog network circuitry is used for slope compensation, then peak current control can be implemented, but reliability issues arise due to additional component requirements
Solution Approach 1:
The patent combines the slope compensation function with the digital compensator by implementing it as a digital ramp signal generated within the microcontroller. This merging eliminates the need for separate external analog network circuitry, thereby improving reliability while reducing device complexity.
Solution Approach 2:
The patent replaces the analog mechanical/electrical slope compensation circuitry with a digital implementation. The digital ramp signal is generated through software algorithms in the microcontroller, substituting physical analog components with digital signal processing, which improves reliability and reduces component count.
2Productivity
If a digital ramp signal is continuously subtracted from the digital peak current reference signal, then slope compensation is achieved, but very high speed interrupts are required that restrict the PWM switching frequency range
Solution Approach 1:
The patent implements slope compensation by adding a fixed digital ramp value to the peak current reference at each PWM cycle boundary, rather than continuously subtracting during the cycle. This periodic action synchronized with the PWM switching eliminates the need for high-speed interrupts during the cycle, allowing operation at high switching frequencies.
Solution Approach 2:
The digital ramp signal is pre-calculated and stored in lookup tables or generated incrementally before the PWM cycle begins. By preparing the slope compensation values in advance, the system avoids time-critical calculations during the PWM cycle, eliminating interrupt timing restrictions and enabling high-frequency operation.
3Ease of operation
If a dedicated core or peripheral is added inside the microcontroller for slope compensation, then computational burden on the CPU is reduced, but microcontroller cost increases
Solution Approach 1:
The patent implements slope compensation using standard microcontroller resources that are already available - the CPU, timers, and basic arithmetic units. The system uses efficient algorithms that leverage existing hardware capabilities rather than requiring additional dedicated peripherals, thereby avoiding increased microcontroller cost while maintaining low computational burden.
Solution Approach 2:
The patent optimizes the slope compensation calculation by changing the computational approach - using incremental updates and lookup tables instead of full mathematical calculations. This parameter change in the computational method reduces CPU load without requiring additional hardware peripherals, avoiding increased manufacturing cost.
4Adaptability or versatility
If analog compensator is replaced with digital compensator, then digital peak current reference signal is generated, but external analog components are required for slope compensation
Solution Approach 1:
The patent merges the digital compensator and slope compensation functions into a single integrated digital control algorithm. The digital ramp signal generation is implemented within the same microcontroller that runs the digital compensator, eliminating the need for external analog components and maintaining full digital control flexibility.
Solution Approach 2:
The patent completely replaces the analog slope compensation network with a digital implementation. The microcontroller generates the digital ramp signal through software, substituting external analog components with digital signal processing, thereby maintaining adaptability while reducing device complexity.
Data Source
AI summary
A mixed signal integrated circuit, such as a typical microcontroller or digital signal controller (DSC), provides digital slope compensation for implementing peak current control in switched mode power supply (SMPS) systems. Simple and fast software calculations using digital values already measured require a single multiply and accumulate instruction (MAC) to determine the slope compensated peak current reference signal, ICMP, that will be compared with the inductor/switch current to control power switch. Doing all calculations in digital form using a software program also allows easy configurability for many different applications, setting slope values by writing to a register(s) in a memory map, and to allow SMPS applications to be dynamically adaptable or configurable on the fly. The entire slope compensation function and PWM control may be self-contained within the microcontroller or DSC and without the need of external components.