Dynamic Charge Pump Stage Control for Power Efficiency
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Solution Overview
Problem
Existing semiconductor storage devices face inefficiencies in generating output voltages higher than the power supply voltage using charge pump circuits, leading to unnecessary current consumption and reduced current efficiency due to the fixed number of stages in the charge pump circuit.
Innovation Solution
The charge pump circuit dynamically adjusts the number of stages and operation steps based on the output voltage level by incorporating a voltage detection circuit between capacitive elements, allowing for efficient boosting operations without unnecessary power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a charge pump circuit with a fixed number of stages is used to generate voltage higher than the power supply voltage, then voltage boosting capability is achieved, but current consumption increases and current efficiency decreases
Solution Approach 1:
The charge pump circuit dynamically adjusts the number of active stages based on the output voltage level. When the output voltage is sufficiently high, fewer stages are activated, reducing current consumption. The circuit uses voltage detection to determine when to reduce the number of active pumping stages, thereby optimizing the balance between voltage generation capability and energy efficiency.
Solution Approach 2:
The circuit changes the operational parameters by varying the number of active charge pump stages according to the output voltage level. This parameter adjustment allows the system to operate efficiently across different voltage conditions, reducing current consumption when full voltage boosting is not required while maintaining the capability to generate higher voltages when needed.
2Power
If a charge pump circuit with a fixed number of stages operates continuously, then voltage boosting is maintained, but unnecessary power consumption occurs when high voltage is not needed
Solution Approach 1:
The charge pump circuit incorporates voltage detection feedback to monitor the output voltage level. Based on this feedback, the circuit automatically adjusts the number of active pumping stages. When the output voltage reaches a sufficient level, the feedback mechanism reduces the number of active stages, preventing unnecessary power consumption while maintaining the required voltage generation capability.
Solution Approach 2:
The circuit employs periodic voltage detection and stage activation/deactivation cycles. Instead of continuous operation of all stages, the system periodically monitors the output voltage and adjusts the number of active stages accordingly, creating an efficient periodic operation pattern that reduces overall power consumption while maintaining voltage boosting when needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances current efficiency by optimizing the number of stages and steps used in the charge pump circuit, preventing excessive power consumption and maintaining high voltage generation capabilities.
Implementation Method 1
a first capacitive element having one end connected to the first node, and the other end connected to a second node
Data Source
AI summary
A charge pump circuit includes a first transistor having a drain connected to an input node, and a source connected to a first node; a second transistor having a drain connected to the first node, and a source connected to an output node; a first capacitor between the first and second nodes; a first inverter including an input node to which a clock signal is supplied and an output node connected to the second node via a first line; a first voltage detection circuit which includes an input node connected to the first line; a third transistor having a source connected to a third node, and a drain connected to the second node; a second inverter including an input node connected to the first voltage detection circuit and an output node connected to a fourth node via a second line; and a second capacitor between the third and fourth nodes.