Logic Circuits Characterised By Logic Function TRIZ Cases
- Sequence Control Circuit for Abnormal Power-Down Protection
A sequence control circuit uses logic AND gates and two-stage MOS transistors to manage power signals.
- Decision Feedback Equalization Circuit for Memory Data Integrity
A decision feedback equalization circuit adjusts signal delays to expand data pulse widths for reliable output.
- Glitch Detection Circuit for Clock Signal Integrity
A glitch detection circuit identifies clock signal anomalies using edge detectors and delayed pulse signals to maintain signal integrity.
- Single-Poly Non-Volatile Memory Cell for Low Power Programming
A single-poly non-volatile memory cell uses a coupling structure to enable efficient page and byte programming modes.
- Superconducting Three-Terminal Device Using Constriction Switching
A superconducting three-terminal device uses a low-resistance constriction to switch currents, eliminating Josephson junctions and magnetic field sensitivity.
- Dual-Function IC Using Orientation-Based Terminal Selection
A dual-function integrated circuit activates specific operations based on package orientation using symmetrical power supply terminals.
- Tunable Homojunction Field Effect Device Artificial Synapse Circuit
Three ambipolar homojunction devices simulate spike-time-dependent plasticity, reducing transistor count and power consumption for neuromorphic chips.
- Contactor State Maintenance via Retention Signal
A contactor driver uses a retention output signal to maintain the operating state of an electric vehicle contactor.
- MuGFET Cascode Circuit for High Output Resistance
Stacking MuGFET devices in a cascode configuration increases output resistance, reduces leakage current, and improves high-frequency performance.
- MRAM Pull-Down Driver for Parasitic Resistance Mitigation
A pull-down driver controls bit line voltages in magnetic memory arrays to maintain sufficient write current levels.
- Vertical Transport Logic Cell Shared Pitch Area Reduction
Vertical transport logic circuit cells share pitch between input and output terminals, reducing contacted polysilicon pitches by 17%.
- DC-DC Converter Reverse Current Monitoring Circuit
A DC-DC converter uses digital logic circuits to detect reverse current during dead time.
- Resistive Memory Logic Gate Stacked on Transistor
Vertical stacking of resistive memory devices on transistors reduces chip surface area while maintaining data non-volatility.
- FinFET DMUX Circuit Segmentation for Area and Power Reduction
Segmented FinFET demultiplexer circuits replace transmission gates with independent logic units, cutting area usage by 8% while lowering power consumption.
- Dynamic Charge Pump Stage Control for Power Efficiency
A charge pump circuit dynamically adjusts active stages based on output voltage levels to optimize current efficiency.