Switched-Capacitor Charge Sharing for In-Memory Analog Multiplication
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Solution Overview
Problem
Existing digital neural network accelerators require extensive data transfer and multiple clock cycles for multiplication and accumulation operations, and prior analog solutions face challenges in achieving sufficient accuracy and energy efficiency, especially when operating on logical inputs from memory storage.
Innovation Solution
Analog multiplication circuits using switched capacitors and SRAM for compute-in-memory solutions, where capacitors represent digital bit values, allowing direct processing of digital inputs without digital-to-analog conversion, enabling parallel multiplication and accumulation operations within a memory array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If digital neural network accelerators are used for multiplication and accumulation operations, then computational accuracy is maintained, but extensive data transfer and multiple clock cycles are required, increasing energy consumption and time
Solution Approach 1:
The patent replaces the digital computational system with an analog electrical system. Capacitors store charge proportional to input values, and charge sharing between capacitors performs multiplication and accumulation operations physically through electrical charge redistribution, eliminating the need for digital computation cycles and reducing energy consumption.
Solution Approach 2:
The patent combines multiplication and accumulation operations into a single analog process. By connecting capacitors representing weights and activations through switch arrays, the system performs both operations simultaneously through charge sharing, rather than executing them as separate digital computational steps.
2Measurement precision
If digital neural network accelerators are used for multiplication and accumulation operations, then computational accuracy is maintained, but multiple clock cycles are required, increasing processing time
Solution Approach 1:
The patent replaces sequential digital computation with parallel analog charge sharing. The multiplication and accumulation operations complete in a single clock cycle through physical charge redistribution, whereas digital systems require multiple sequential computational steps.
Solution Approach 2:
The patent pre-charges capacitors with values proportional to inputs before the computation phase. This preliminary charging allows the subsequent charge sharing operation to complete the multiplication and accumulation in a single step, eliminating the need for multiple computational iterations.
3Use of energy by moving object
If prior analog solutions are used for multiplication operations, then energy consumption is reduced, but sufficient accuracy is difficult to achieve
Solution Approach 1:
The patent uses capacitors that can represent multiple values through different charge levels, and switch arrays that can configure multiple computational paths. This multi-functionality allows the same hardware to accurately represent various input values and perform precise analog computations without requiring additional components.
Solution Approach 2:
The patent controls the precision of analog computations by adjusting parameters such as capacitor ratios, switch resistance, and charge levels. By optimizing these parameters, the system achieves sufficient accuracy for neural network operations while maintaining the energy efficiency of analog processing.
4Measurement precision
If data is transferred extensively in digital domain for neural network operations, then computational accuracy is maintained, but hardware footprint increases
Solution Approach 1:
The patent merges storage and computation functions into a single analog system. Capacitors store input values and simultaneously participate in computational operations through charge sharing, eliminating the need for separate data transfer pathways and reducing the hardware footprint required for digital data movement.
Solution Approach 2:
The patent replaces digital data transfer mechanisms with direct analog charge sharing between capacitors. This substitution eliminates the need for complex digital data pathways, buffers, and converters, significantly reducing the hardware footprint while maintaining computational functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces energy consumption, minimizes clock cycles, maintains accuracy, and allows for efficient execution of vector matrix multiplication operations by directly processing digital inputs in the analog domain, avoiding errors from digital-to-analog conversion and enabling highly parallelizable MAC calculations.
Implementation Method 1
A plurality of capacitors are selectively charged to represent a first operand. Each capacitor has a capacitance corresponding to a bit value of a logical bit in a plurality of logical bits.
Implementation Method 2
After charging the plurality of capacitors, the second switch is switched away from the voltage source and the plurality of first switches are connected to the common interconnect to average the charge across the plurality of capacitors.
Data Source
AI summary
An analog multiplication circuit includes switched capacitors to multiply digital operands in an analog representation and output a digital result with an analog-to-digital convertor. The capacitors are arranged with a capacitance according to the respective value of the digital bit inputs. To perform the multiplication, the capacitors are selectively charged according to the first operand of the multiplication. The capacitors are then connected to a common interconnect for charge sharing across the capacitors, averaging the charge according to the charge determined by the first operand. The capacitor are then maintained or discharged according to a second operand, such that the remaining charge represents a number of “copies” of the averaged charge. The capacitors are then averaged and output for conversion by an analog-to-digital convertor. This circuit may be repeated to construct a multiply-and-accumulate circuit by combining charges from several such multiplication circuits.